SLLU397 April   2025

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  6. 2Hardware
    1.     Jumper Information
    2. 2.1 EVM Setup and Operation
      1. 2.1.1 Overview and Basic Operation Settings
        1. 2.1.1.1  Power Supply Inputs VBAT, VCC and VIO
        2. 2.1.1.2  I/O Headers (J2, J4)
        3. 2.1.1.3  Pin 14
        4. 2.1.1.4  TXD Input
        5. 2.1.1.5  RXD Output
        6. 2.1.1.6  Pin 11
        7. 2.1.1.7  Pin 6
        8. 2.1.1.8  Pin 8
        9. 2.1.1.9  Pin 7
        10. 2.1.1.10 WAKE Pin
        11. 2.1.1.11 SIC Network Configuration (J10 and J11)
      2. 2.1.2 Using CAN Bus Load, Termination, and Protection Configurations
      3. 2.1.3 Using Customer Installable I/O Options for Current Limiting, Pullup and Pulldown, Noise Filtering
  7. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  8. 4Additional Information
    1. 4.1 Trademarks

2.1.1.10 WAKE Pin

The WAKE pin of the transceiver (pin 9) is routed to J4. The signal path to the J2 header is pre-installed the with a 22nF filtering capacitor, C8, a 3.3kΩ pullup resistor to VSUP, R22, and a 33.2kΩ series resistor, R23. The switch S1 can be used to generate a rising or falling edge to wake up the device in addition to the J4 header.