SLUAB11 November 2025 AMC23C12-Q1 , TMCS1126-Q1 , UCC21750-Q1
Figure 4-1 shows the hardware test setup. Two SiC MOSFET in a HU3PAK package with a typical on state resistance of RDS = 25mΩ are used for the measurements. The drain and source pins of the MOSFET SLS are soldered together to maintain a low impedance short circuit. The MOSFET SHS is controlled by a UCC21750-Q1 gate driver and the gate-driver signal is generated by the control PCB using a LAUNCHXL- F280025C launchpad. All three discussed short-circuit detection circuits are implemented on the PCB. For the DC-link capacitor, a total of CB = 20μF film capacitors are used. Multilayer ceramic chip capacitors (MLCCs) are used for the commutation capacitance CC = 100nF (unless otherwise specified) to provide a low inductive commutation path. All the short-circuit detection methods are set to a trigger threshold of 100A. The measurement results of each detection method are analyzed in the following. Only one method is active during each measurement, while the other two methods are deactivated or removed.