SLVSJM6 November 2025 MSPM0G5187
UNICOMMUART Module
Functional
Inconsistent STOP bit length causing RTOUT/LTOUT period computation issues
On receiver side the function state machine is designed in such a way that the state goes from stop bit to idle at the mid of the stop bit, this causes RTOUT counter to start counting before it should actually have started. This leads to incorrect RTOUT period and RTOUT interrupt comes earlier than expected.
Add compensation with a half stop bit period to the RTOUT counter