SNVU891 February   2025 LM25137 , LM25137-Q1 , LM25137F-Q1 , LM5137 , LM5137-Q1 , LM5137F-Q1

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
      1. 1.3.1 Application Circuit Diagrams
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Test Setup and Procedure
      1. 2.1.1 EVM Connections
      2. 2.1.2 Test Equipment
      3. 2.1.3 Recommended Test Setup
        1. 2.1.3.1 Input Connections
        2. 2.1.3.2 Output Connections
      4. 2.1.4 Test Procedure
        1. 2.1.4.1 Line and Load Regulation, Efficiency
  9. 3Implementation Results
    1. 3.1 Test Data and Performance Curves
      1. 3.1.1 Efficiency
      2. 3.1.2 Operating Waveforms
        1. 3.1.2.1 Load Transient Response
        2. 3.1.2.2 Start-Up and Shutdown With VIN
        3. 3.1.2.3 Start-Up and Shutdown With ENABLE ON and OFF
        4. 3.1.2.4 Switching Operation
  10. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layout
      1. 4.2.1 Component Drawings
      2. 4.2.2 Layout Guidelines
    3. 4.3 Bill of Materials
  11. 5Additional Information
    1. 5.1 Trademarks
  12. 6Device and Documentation Support
    1. 6.1 Device Support
      1. 6.1.1 Development Support
    2. 6.2 Documentation Support
      1. 6.2.1 Related Documentation
        1. 6.2.1.1 Low-EMI Design Resources
        2. 6.2.1.2 PCB Layout Resources
        3. 6.2.1.3 Thermal Design Resources

Features

  • Maximum input voltage of 72V
    • VIN UVLO thresholds set at 42V (on), 36V (off)
  • Tightly regulated output voltage of 12V rated at 20A with 1mV load and line regulation
  • High efficiency: 95.5% at 48VIN, 20AOUT
    • VCC bias power derived from the 12V output
  • Switching frequency of 400kHz synchronizable ±20% with an external clock signal
  • Input π-stage EMI filter helps meet CISPR 25
    • Spread spectrum (DRSS) option for lower electromagnetic interference (EMI)
    • Electrolytic capacitor for parallel damping
  • Peak current-mode control architecture provides fast line and load transient response
    • Integrated slope compensation
    • Forced PWM (FPWM) or pulsed frequency modulation (PFM) mode operation
  • Integrated power MOSFET gate drivers
    • 3A sink, 2A source gate drive current capability
    • Adaptive deadtime control reduces power dissipation and MOSFET temperature rise
  • Integrated protection features for robust design
    • Overcurrent protection (OCP) with shunt or inductor DCR current sensing
    • Monotonic prebias output voltage start-up
    • User-adjustable soft-start time set to 4.5ms
    • PG and FAULT outputs for each channel
    • Current monitor output (IMON1, IMON2)
  • Fully assembled, tested and proven PCB layout with 3.3" × 2.9" (84mm × 74mm) total footprint