LPCOMP is a ultra low-power clocked
comparator that can be used for medium accuracy, low speed operations where power
consumption is the main concern. Typical applications are wake-up on analog events
like power supply monitoring or external transducers that generate analog output
signals. The comparator includes input multiplexers on both signal (positive) side
and reference (negative) side, a capacitive divider for low-power division of either
the reference signal or the input signal, and programmable hysteresis that can be
configured to trigger on both low and high comparator output.
Features
- Can be used for voltage
monitoring in standby mode with ultra-low power consumption
- Operational across device supply voltage range
- Programmable Voltage Divider - 2
modes of operation:
- Voltage Divider on
Reference Side: The voltage divider block is configured on the reference
side of the amplifier and the inputs can be divided in the ratio of 1/4,
1/3, 1/2, 3/4, and 1/1 with optional hysteresis applied.
- Voltage Divider on
Signal Side: The voltage divider block is configured on the signal side
of the amplifier and the inputs can be divided in the ratio of 1/4, 1/3,
1/2, 3/4, and 1/1 with optional hysteresis applied.
- Input multiplexers - The input
multiplexers present on the reference and signal side of amplifier provide
greater flexibility on selecting the signal and reference inputs to the
amplifier based on system requirements. The multiplexers can pass inputs from
external pins or from supply voltages. The multiplexer on the reference side is
connected to both VDDS and VDDD which can be used as internal references. The
multiplexer on the signal side is directly connected to VDDS which can be used
for monitoring the supply voltage.
- Hysteresis Polarity - The
polarity of the hysteresis can be changed based on whether the voltage divider
is present on signal side or reference side. This is controlled by the
SYS0:LPCMPCFG[30] HYSPOL bit.