JAJSNW6 December   2022 UCC21551-Q1

ADVANCE INFORMATION  

1. 1 特長
2. 2 アプリケーション
3. 3 概要
4. 4 Revision History
5. 5 概要 (続き)
6. 6 Pin Configuration and Functions
7. 7 Specifications
   1. 7.1  Absolute Maximum Ratings
   2. 7.2  ESD Ratings (Automotive)
   3. 7.3  Recommended Operating Conditions
   4. 7.4  Thermal Information
   5. 7.5  Power Ratings
   6. 7.6  Insulation Specifications
   7. 7.7  Safety-Related Certifications
   8. 7.8  Electrical Characteristics
   9. 7.9  Switching Characteristics
   10. 7.10 Typical Characteristics
8. 8 Parameter Measurement Information
   1. 8.1 Propagation Delay and Pulse Width Distortion
   2. 8.2 Rising and Falling Time
   3. 8.3 Input and Enable Response Time
   4. 8.4 Programable Dead Time
   5. 8.5 Power-up UVLO Delay to OUTPUT
   6. 8.6 CMTI Testing
9. 9 Detailed Description
   1. 9.1 Overview
   2. 9.2 Functional Block Diagram
   3. 9.3 Feature Description
      1. 9.3.1 VDD, VCCI, and Undervoltage Lock Out (UVLO)
      2. 9.3.2 Input and Output Logic Table
      3. 9.3.3 Input Stage
      4. 9.3.4 Output Stage
      5. 9.3.5 Diode Structure in the UCC21551x-Q1
   4. 9.4 Device Functional Modes
      1. 9.4.1 Enable Pin
      2. 9.4.2 Programmable Dead-Time (DT) Pin
         1. 9.4.2.1 Tying the DT Pin to VCC
         2. 9.4.2.2 DT Pin Connected to a Programming Resistor Between DT and GND Pins
10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
       1. 10.2.1 Design Requirements
       2. 10.2.2 Detailed Design Procedure
          1. 10.2.2.1 Designing INA/INB Input Filter
          2. 10.2.2.2 Select External Bootstrap Diode and its Series Resistor
          3. 10.2.2.3 Gate Driver Output Resistor
          4. 10.2.2.4 Gate to Source Resistor Selection
          5. 10.2.2.5 Estimate Gate Driver Power Loss
          6. 10.2.2.6 Estimating Junction Temperature
          7. 10.2.2.7 Selecting VCCI, VDDA/B Capacitor
             1. 10.2.2.7.1 Selecting a VCCI Capacitor
             2. 10.2.2.7.2 Selecting a VDDA (Bootstrap) Capacitor
             3. 10.2.2.7.3 Select a VDDB Capacitor
          8. 10.2.2.8 Dead Time Setting Guidelines
          9. 10.2.2.9 Application Circuits with Output Stage Negative Bias
       3. 10.2.3 Application Curves
11. 11Power Supply Recommendations
12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
13. 13Device and Documentation Support
    1. 13.1 Device Support
       1. 13.1.1 サード・パーティ製品に関する免責事項
    2. 13.2 Documentation Support
       1. 13.2.1 Related Documentation
    3. 13.3 Certifications
    4. 13.4 Receiving Notification of Documentation Updates
    5. 13.5 サポート・リソース
    6. 13.6 Trademarks
    7. 13.7 静電気放電に関する注意事項
    8. 13.8 用語集
14. 14Mechanical, Packaging, and Orderable Information