SBAA494B April   2022  – October 2026 PCM3120-Q1 , PCM5120-Q1 , PCM6120-Q1 , TLV320ADC3120 , TLV320ADC5120 , TLV320ADC6120

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Processing Blocks of TLV320ADCx120 and PCMx120-Q1
    1. 2.1 Decimation Filter Response
      1. 2.1.1 Supported Sample Rates
    2. 2.2 AGC, DRE, or DRC
      1. 2.2.1 Supported Sample Rates
      2. 2.2.2 Channel Assignment
    3. 2.3 Channel Summer, Digital Mixer, and Bi-quads
  6. 3Processing Blocks Supported for Different Sample Rates
    1. 3.1 8kHz Sample Rate
    2. 3.2 16kHz-48kHz Sample Rate
    3. 3.3 96kHz Sample Rate
    4. 3.4 192kHz Sample Rate
    5. 3.5 384kHz Sample Rate
    6. 3.6 768kHz Sample Rate
  7. 4Example Configurations
  8. 5Related Documentation
  9. 6Revision History

Abstract

This application note describes the available processing blocks in the decimation filter chain of the TLV320ADCx120 and PCMx120-Q1 family of devices. The document also explains the supported configurations of the various processing blocks as a function of the sample rate and number of channels.