SBAA637 June   2024 AFE7950

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 SPI Failure During Bring-Up
    1. 2.1 Detail Regarding Chip Readouts
    2. 2.2 Failure and Fix for Chip Read Check
    3. 2.3 Poll Check for SPI Access for PLL Page
    4. 2.4 Failure and Fix for the SPI Poll Check for PLL Page Access
    5. 2.5 Read Check Indicating Status of Fuse Farm Autoload
    6. 2.6 Failure and Fix for Autoload Read Check
  6. 3 Macro Failure Breaking the Bring-Up Flow
    1. 3.1 Read Check for Macro Error and Poll Check for Macro Done
    2. 3.2 Failure and Fix for Macro Error and Poll check for Macro Done
  7. 4 AFE PLL Failure
    1. 4.1 Read Check for PLL Lock
    2. 4.2 Failure and Fix for Read Check of PLL
  8. 5 AFE Internal Sysref Flag Failure
    1. 5.1 Read Check Status of Sysref Flag Bit
    2. 5.2 Failure and Fix for Read Check Status of Sysref Flag Bit
  9. 6 JESD Link Check Failure
    1. 6.1 Multiple Read Checks Indicating Status of JESD Linkup
    2. 6.2 Failure and Fix for JESD Error
  10. 7 Validating Serdes and JESD Link using CAPI
    1. 7.1 Useful Serdes Debug CAPIs
    2. 7.2 Useful JESD Debug CAPIs
  11. 8 TX Chain Validation
  12. 9 RX Chain Validation
  13. 10Device Health
  14. 11Summary
  15. 12References

2.2 Failure and Fix for Chip Read Check

  1. Chip readout as 0x0 or 0xff:
    1. We can check if SPI is working correctly. Make sure the Address length is 16, packet length is 24, packet order as Address first, packet type as MSB first, enable state as Active low, Data latch on positive edge for write and negative edge for read also check the physical SPI Driver connection and SPI and GPIO Logic for AFE works at 1.8V.
    2. If all the settings are as expected, next step is to probe the SEN, SCLK, SDI, SDO and check for waveform level and timing data to make sure proper functionality for SPI Driver and AFE.
    3. If Timing and Level of SEN, SCLK and SDI is expected and if AFE is not responding and if SDO is low. Do HW Reset of the AFE and write SPI write for configuring 4 wire or 3 wire mode depend upon your system need.

      SPIWrite 0000,30,0,7 //Bit 4 (1: 4 Pin control; 0: 3 Pin control)

    4. Check for device input voltage levels and check for device reset state current level.
  2. Incorrect LSB readout: Check for the above-mentioned SPI setting and check the timing of the SDO, SCLK and SEN. For debug purpose we can call any of the chip readout separately and Probe the SPI Pins. SEN need to be held one more extra clock cycle with the last SCLK edge.
  3. Before moving forward with the AFE bring-up process, it is important to verify the implementation of SPI Burst write. This is essential because SPI Burst write is utilized in various aspects of the AFE bring-up, and any issue with the implementation can potentially lead to macro error later on. There is certain macro operation which involves loading and verifying the success of burst write operation. To verify we can use a fix bus write sequence and read the register sequentially. SPIBurstWrite 0010, [01,02,03,04,05,06,07,08,09,0A] then, read SPI address from 0x10 to 0x19 and confirm if readout is as expected. Later set all address back to zero.