SBAA637 June   2024 AFE7900 , AFE7901 , AFE7903 , AFE7906 , AFE7950 , AFE7950-SP , AFE7951 , AFE7953 , AFE7954 , AFE7955 , AFE7958

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 SPI Failure During Bring-Up
    1. 2.1 Detail Regarding Chip Readouts
    2. 2.2 Failure and Fix for Chip Read Check
    3. 2.3 Poll Check for SPI Access for PLL Page
    4. 2.4 Failure and Fix for the SPI Poll Check for PLL Page Access
    5. 2.5 Read Check Indicating Status of Fuse Farm Autoload
    6. 2.6 Failure and Fix for Autoload Read Check
  6. 3 Macro Failure Breaking the Bring-Up Flow
    1. 3.1 Read Check for Macro Error and Poll Check for Macro Done
    2. 3.2 Failure and Fix for Macro Error and Poll check for Macro Done
  7. 4 AFE PLL Failure
    1. 4.1 Read Check for PLL Lock
    2. 4.2 Failure and Fix for Read Check of PLL
  8. 5 AFE Internal Sysref Flag Failure
    1. 5.1 Read Check Status of Sysref Flag Bit
    2. 5.2 Failure and Fix for Read Check Status of Sysref Flag Bit
  9. 6 JESD Link Check Failure
    1. 6.1 Multiple Read Checks Indicating Status of JESD Linkup
    2. 6.2 Failure and Fix for JESD Error
  10. 7 Validating Serdes and JESD Link using CAPI
    1. 7.1 Useful Serdes Debug CAPIs
    2. 7.2 Useful JESD Debug CAPIs
  11. 8 TX Chain Validation
  12. 9 RX Chain Validation
  13. 10Device Health
  14. 11Summary
  15. 12References

3.2 Failure and Fix for Macro Error and Poll check for Macro Done

  1. Macro operation are sensitive to AFE power nets (0.925V, 1.2V and 1.8V). First make sure all voltages are within range and also the current limit for each rail is sufficient up to 3A. It is observed that if the current sourcing is not sufficient then there could be a voltage dip and could result in Macro failure.
  2. For some macro operation to be successful, Sysref functionality needs to beokay. It is important to check if Sysref level is reaching device pin as per data sheet specification range and frequency.
  3. When failure is in (SPIPoll 00f0,0,0,01) that is, Macro Ready fails means that the macro is still busy and not able to take up new operation. Once the issue is located to which section of macro ready is failing. Some delay (WAIT 1) can be added before the failing macro ready command and checked. In case if the failure still exists check for point 1.
  4. When failure is in (SPIPoll 00f0,2,2,04) that is, Macro Done is failing means the macro is still working on current operation. Once the issue is located to which section of macro done is failing. Some delay (WAIT 1) can be added before the failing macro done command and checked, in case if the failure still exists check for point 1.
  5. Now if the failure is in (SPIReadCheck 00f0,3,3,00) then it means there has happened a macro error during the current macro operation. We have readout register which gives more detail on what type of error has happen, we can read below writes to get more insight on error and for more detail can check TRM document and parallelly check for point 1.
    SPIWrite 0018,20,0,7
SPIRead 00f1,0,7	//Read	MACRO_ERROR_OPCODE=0x0;
SPIRead 00f0,4,4	//Read	MACRO_ERROR_IN_OPCODE=0x0;
SPIRead 00f0,5,5	//Read	MACRO_ERROR_OPCODE_NOT_ALLOWED=0x0;
SPIRead 00f0,6,6	//Read	MACRO_ERROR_IN_OPERAND=0x0;
SPIRead 00f0,7,7	//Read	MACRO_ERROR_IN_EXECUTION=0x0;
SPIRead 00f3,0,7	//Read	MACRO_ERROR_EXTENDED_CODE=0x0;
SPIRead 00f2,0,7	//Read	MACRO_ERROR_EXTENDED_CODE=0x0;
SPIRead 00f4,0,7	//Read	MACRO_ERROR_EXTENDED_CODE=0x0;
SPIRead 00f5,0,7	//Read	MACRO_ERROR_EXTENDED_CODE=0x0;
SPIWrite 0018,00,0,7
  6. Effective execution of the for 0x78 macro opcode, hinges on precise implementation of SPI Burst writes.