The actual circuit can be tested to verify the simulations using ADS127L21EVM-PDK and PGA855EVM with the modifications described in Figure 2-1.

The anti-aliasing filter can be tested with a low-distortion sine wave generator, while using the ADS127L21EVM-PDK-GUI is used to collect data.

The results shown in Figure 2-8 and Figure 2-9 are sound responses across varying frequencies and PGA855 gains. Figure 2-9 shows that harmonic noise gets worse at higher frequencies, only jumping back down when the signal is close to the cutoff. As for SNR, the noise floor is comparable across gains at 100kHz and 200kHz but at frequencies at 100kHz and below, the high gain signals are noisier than unity or low gain signals. This makes sense since the input signal before high gain filters need to be small to reach the same output at the PGA855.

Figure 2-8 SNR

Figure 2-9 THD

Magnitude is an extremely important measurement to confirm the new cut off frequency which was predicted by the simulations. This can be seen best in the graph seen in Figure 2-10. This shows not only a similar shape as the one seen in the Figure 2-3, but a cut off frequency well beyond the target frequencies.

Figure 2-10 Anti-Alias Filter Magnitude

The group delay was calculated from phase measurements across the bandwidth. Figure 2-11 shows that the group delay remains low across the entire bandwidth (the group delay was simulated on a microsecond scale, while it was measured on a nanosecond scale). This is consistent with the simulation in Figure 2-5, which showed that the change in delay across the entire signal chain was around 10ns from DC to 100kHz. A consistent delay allows the computer to consistently anticipate when the proper data can be received between the input and output of the DAQ system.

Figure 2-11 Group Delay of the Signal Chain (Normalized to 10kHz)