Product details

PGA/VGA PGA Number of channels 1 BW at Acl (MHz) 10 Vs (max) (V) 36 Vs (min) (V) 8 Gain (max) (dB) 24 Architecture Fully Differential ADC Driver Slew rate (typ) (V/µs) 35 Operating temperature range (°C) -40 to 125 Rating Catalog
PGA/VGA PGA Number of channels 1 BW at Acl (MHz) 10 Vs (max) (V) 36 Vs (min) (V) 8 Gain (max) (dB) 24 Architecture Fully Differential ADC Driver Slew rate (typ) (V/µs) 35 Operating temperature range (°C) -40 to 125 Rating Catalog
VQFN (RGT) 16 9 mm² 3 x 3
  • Eight pin-programmable binary gains
    • G (V/V) = ⅛, ¼, ½, 1, 2, 4, 8, and 16
  • Low gain error drift: 1 ppm/°C (max) at G = 1 V/V
  • Fully differential outputs
    • Independent output power-supply pins to allow for ADC input overdrive protection
    • Output common-mode control
  • Faster signal processing:
    • Wide bandwidth: 10 MHz at all gains
    • High slew rate: 35 V/µs
    • Settling time: 500 ns to 0.01%, 950 ns to 0.0015%
    • Input stage noise: 7.8 nV/√ Hz at G = 16 V/V
    • Filter option to achieve better SNR
  • Input overvoltage protection to ±40 V beyond supplies
  • Input-stage supply range:
    • Single supply: 8 V to 36 V
    • Dual supply: ±4 V to ±18 V
  • Output-stage supply range:
    • Single supply: 4.5 V to 36 V
    • Dual supply: ±2.25 V to ±18 V
  • Specified temperature range: ­–40°C to +125°C
  • Small package: 3-mm × 3-mm VQFN
  • Eight pin-programmable binary gains
    • G (V/V) = ⅛, ¼, ½, 1, 2, 4, 8, and 16
  • Low gain error drift: 1 ppm/°C (max) at G = 1 V/V
  • Fully differential outputs
    • Independent output power-supply pins to allow for ADC input overdrive protection
    • Output common-mode control
  • Faster signal processing:
    • Wide bandwidth: 10 MHz at all gains
    • High slew rate: 35 V/µs
    • Settling time: 500 ns to 0.01%, 950 ns to 0.0015%
    • Input stage noise: 7.8 nV/√ Hz at G = 16 V/V
    • Filter option to achieve better SNR
  • Input overvoltage protection to ±40 V beyond supplies
  • Input-stage supply range:
    • Single supply: 8 V to 36 V
    • Dual supply: ±4 V to ±18 V
  • Output-stage supply range:
    • Single supply: 4.5 V to 36 V
    • Dual supply: ±2.25 V to ±18 V
  • Specified temperature range: ­–40°C to +125°C
  • Small package: 3-mm × 3-mm VQFN

The PGA855 is a high-bandwidth programmable gain instrumentation amplifier with fully differential outputs. The PGA855 is equipped with eight binary gain settings, from an attenuating gain of 0.125 V/V to a maximum of 16 V/V, using three digital gain selection pins. The output common-mode voltage can be independently set using the VOCM pin.

The PGA855 architecture is optimized to drive inputs of high-resolution, precision analog-to-digital converters (ADCs) with sampling rates up to 4 MSPS without the need for an additional ADC driver. The output-stage power supplies (LVSS/LVDD) are decoupled from the input stage and can be connected to power supplies of the ADC to protect the ADC or downstream device against overdrive damage.

The super-beta input transistors offer an impressively low input bias current, which in turn provides a very low input current noise density of 0.3 pA/√ Hz, making the PGA855 a versatile choice for virtually any sensor type. The low-noise current-feedback front-end architecture offers excellent gain flatness, even at high frequencies, making the PGA855 an excellent high-impedance sensor readout device. Integrated protection circuitry on the input pins handles overvoltages up to ±40 V beyond the power-supply voltages.

The PGA855 is a high-bandwidth programmable gain instrumentation amplifier with fully differential outputs. The PGA855 is equipped with eight binary gain settings, from an attenuating gain of 0.125 V/V to a maximum of 16 V/V, using three digital gain selection pins. The output common-mode voltage can be independently set using the VOCM pin.

The PGA855 architecture is optimized to drive inputs of high-resolution, precision analog-to-digital converters (ADCs) with sampling rates up to 4 MSPS without the need for an additional ADC driver. The output-stage power supplies (LVSS/LVDD) are decoupled from the input stage and can be connected to power supplies of the ADC to protect the ADC or downstream device against overdrive damage.

The super-beta input transistors offer an impressively low input bias current, which in turn provides a very low input current noise density of 0.3 pA/√ Hz, making the PGA855 a versatile choice for virtually any sensor type. The low-noise current-feedback front-end architecture offers excellent gain flatness, even at high frequencies, making the PGA855 an excellent high-impedance sensor readout device. Integrated protection circuitry on the input pins handles overvoltages up to ±40 V beyond the power-supply voltages.

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* Data sheet PGA855 Low-Noise, Wide-Bandwidth, Fully Differential Output Programmable-Gain Instrumentation Amplifier datasheet (Rev. A) PDF | HTML 21 Sep 2023
EVM User's guide PGA855 Evaluation Module User's Guide PDF | HTML 11 Apr 2023
More literature PLC Analog Input Front-End Architectures PDF | HTML 31 Jul 2022

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