Product details

Resolution (Bits) 24 Sample rate (max) (ksps) 1365 Number of input channels 1 Interface type SPI Architecture Delta-Sigma Input type Differential, Single-ended Rating Catalog TI functional safety category Functional Safety-Capable Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator, Small Size, Wideband Operating temperature range (°C) -40 to 125 Analog supply voltage (min) (V) 2.85 Analog supply voltage (max) (V) 5.5 SNR (dB) 110 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
Resolution (Bits) 24 Sample rate (max) (ksps) 1365 Number of input channels 1 Interface type SPI Architecture Delta-Sigma Input type Differential, Single-ended Rating Catalog TI functional safety category Functional Safety-Capable Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator, Small Size, Wideband Operating temperature range (°C) -40 to 125 Analog supply voltage (min) (V) 2.85 Analog supply voltage (max) (V) 5.5 SNR (dB) 110 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
WQFN (RUK) 20 9 mm² (3 mm × 3 mm)
  • Programmable FIR filter
  • Programmable IIR filter
  • Wideband or low-latency filter modes
  • Programmable data rates:
    • Wideband filter: 512kSPS
    • Low-latency filter: 1.365MSPS
  • Conversion latency (low-latency filter): 3µs
  • AC accuracy with dc precision:
    • Dynamic range (200kSPS): 111.5dB (typical)
    • THD: –125dB (typical)
    • INL: 0.4ppm of FSR (typical)
    • Offset drift: 50nV/°C (typical)
    • Gain drift: 0.5ppm/°C (typical)
  • Power-scalable speed ranges:
    • Max speed: 512kSPS, 33mW (typical)
    • High speed: 400kSPS, 26mW (typical)
    • Mid speed: 200kSPS, 14mW (typical)
    • Low speed: 50kSPS, 4.3mW (typical)
  • Input range: ±VREF or ±2VREF
  • Buffered inputs
  • Internal or external clock operation
  • Functional Safety-Capable
  • Programmable FIR filter
  • Programmable IIR filter
  • Wideband or low-latency filter modes
  • Programmable data rates:
    • Wideband filter: 512kSPS
    • Low-latency filter: 1.365MSPS
  • Conversion latency (low-latency filter): 3µs
  • AC accuracy with dc precision:
    • Dynamic range (200kSPS): 111.5dB (typical)
    • THD: –125dB (typical)
    • INL: 0.4ppm of FSR (typical)
    • Offset drift: 50nV/°C (typical)
    • Gain drift: 0.5ppm/°C (typical)
  • Power-scalable speed ranges:
    • Max speed: 512kSPS, 33mW (typical)
    • High speed: 400kSPS, 26mW (typical)
    • Mid speed: 200kSPS, 14mW (typical)
    • Low speed: 50kSPS, 4.3mW (typical)
  • Input range: ±VREF or ±2VREF
  • Buffered inputs
  • Internal or external clock operation
  • Functional Safety-Capable

The ADS127L21 is a 24-bit, delta-sigma (ΔΣ), analog-to-digital converter (ADC) featuring programmable digital filters. This digital filter has data rates up to 512kSPS using the wideband filter and up to 1365kSPS using the low-latency filter. The device offers an excellent combination of ac performance and dc precision with low power consumption.

Programmable infinite and finite impulse response (IIR and FIR) digital filters allow custom filter profiles, such as A-weighting compensation and frequency notch filters. The wideband or low-latency filter option optimize ac-signal performance or data throughput of dc signals, all in one device.

The low-drift modulator achieves excellent dc precision with low wideband noise for outstanding ac performance. The power-scalable architecture features four speed modes to optimize data rate, resolution, and power consumption. Signal and reference input buffers reduce driver loading for increased accuracy.

The serial interface features daisy-chain capability to reduce the number of signal lines over an isolation barrier. SPI input data and register memory contents are validated by cyclic-redundancy check (CRC) to enhance operational reliability.

The small 3mm × 3mm WQFN package is designed for space-limited applications. The device is fully specified for operation over the –40°C to +125°C temperature range.

The ADS127L21 is a 24-bit, delta-sigma (ΔΣ), analog-to-digital converter (ADC) featuring programmable digital filters. This digital filter has data rates up to 512kSPS using the wideband filter and up to 1365kSPS using the low-latency filter. The device offers an excellent combination of ac performance and dc precision with low power consumption.

Programmable infinite and finite impulse response (IIR and FIR) digital filters allow custom filter profiles, such as A-weighting compensation and frequency notch filters. The wideband or low-latency filter option optimize ac-signal performance or data throughput of dc signals, all in one device.

The low-drift modulator achieves excellent dc precision with low wideband noise for outstanding ac performance. The power-scalable architecture features four speed modes to optimize data rate, resolution, and power consumption. Signal and reference input buffers reduce driver loading for increased accuracy.

The serial interface features daisy-chain capability to reduce the number of signal lines over an isolation barrier. SPI input data and register memory contents are validated by cyclic-redundancy check (CRC) to enhance operational reliability.

The small 3mm × 3mm WQFN package is designed for space-limited applications. The device is fully specified for operation over the –40°C to +125°C temperature range.

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Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

ADS127L21EVM-PDK — ADS127L21 evaluation module for ADC with easy-to-drive inputs and wideband or low-latency filters

The ADS127L21EVM-PDK is an evaluation platform for the ADS127L21 24-bit, high-speed custom-wide-bandwidth filter delta-sigma (ΔΣ) analog-to-digital converter (ADC). The evaluation kit includes the ADS127L21EVM board, the PHI controller board, and accompanying computer software that enables the (...)
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Support software

ADS127L21-C-EXAMPLE-CODE — ADS127L21 example C code

Expedite your embedded design using this example C code for the ADS127L21
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Simulation model

ADS127L21 IBIS Model

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Calculation tool

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The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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Reference design

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Package Pins CAD symbols, footprints & 3D models
WQFN (RUK) 20 Ultra Librarian

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