SBAA702 July   2025 AFE8190

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Fast Bring-up on AFE81xx
  6. 3 Fast Bring-up Sequence
  7. 4 Input Parameter Constraint
  8. 5 Calibration Memory
  9. 6 Fuse Blow Requirement
  10. 7 Drifts and Aging
  11. 8 Device Bring-up Time
  12. 9 Summary
  13. 10References

7 Drifts and Aging

The calibration values are expected to remain valid across time or temperature for given system settings (input clock, serdes configuration, lane rate and so on) The fast bring-up forces initial operating point for blocks that need power up calibration. For example, the during normal power up calibration, the device converges to designed for PLL setting as per input clock frequency. In fast bring-up case, the device uses stored values to lock PLL on input clock. Clearly, this does not affect the PLL’s ability to lock or track input clock across time or temperature variations. This also does not limit the internal real-time calibrations of device.