SBAA729 August   2025 AFE7900 , AFE7901 , AFE7903 , AFE7906 , AFE7950 , AFE7951 , AFE7953 , AFE7954 , AFE7955 , AFE7958

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Hardware Setup for Using BRINGUP_AFE Module
  6. 3Interface Between Memory and BRINGUP_AFE Module
  7. 4Configuration of Control Registers and Status Flags in BRINGUP_AFE Module
    1. 4.1 Instruction Sets
  8. 5Bringup With BRINGUP_AFE Module
  9. 6Bringup With Error Decoding
  10. 7Summary
  11. 8References

3 Interface Between Memory and BRINGUP_AFE Module

BRINGUP_AFE module sets mem_addr port to indicate the address from which memory can populate the data on mem_data port. Upon reset (rst_n = 0) or when start_bringup = 0, mem_addr is set to 0. When device is out of reset (rst_n = 1) and start_bringup = 1, bringup instructions are executed. After executing each instruction, mem_addr is incremented by 1. Whenever mem_addr value changes, memory can set mem_data_valid port to 0 within one BRINGUP_AFE clock cycle. Once memory completed populating the data at mem_addr on to mem_data port, mem_data_valid can be set to 1.

Note: If the data at mem_addr in memory is reflected on mem_data port within one clock cycle of BRINGUP_AFE module, then mem_data_valid port can always be set to 1.
Timing of Data Transfer Between BRINGUP_AFE Module and Memory Figure 3-1 Timing of Data Transfer Between BRINGUP_AFE Module and Memory