SBASA22B September   2022  – January 2025 ADS131B26-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Timing Diagram
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Offset Drift Measurement
    2. 6.2 Gain Drift Measurement
    3. 6.3 Noise Performance
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Naming Conventions
      2. 7.3.2 Precision Voltage References (REFA, REFB)
      3. 7.3.3 Clocking (MCLK, OSCM, OSCD)
      4. 7.3.4 ADC1y
        1. 7.3.4.1 ADC1y Input Multiplexer
        2. 7.3.4.2 ADC1y Programmable Gain Amplifier (PGA)
        3. 7.3.4.3 ADC1y ΔΣ Modulator
        4. 7.3.4.4 ADC1y Digital Filter
        5. 7.3.4.5 ADC1y Offset and Gain Calibration
        6. 7.3.4.6 ADC1y Conversion Data
      5. 7.3.5 ADC2y
        1. 7.3.5.1 ADC2y Input Multiplexer
        2. 7.3.5.2 ADC2y Programmable Gain Amplifier (PGA)
        3. 7.3.5.3 ADC2y ΔΣ Modulator
        4. 7.3.5.4 ADC2y Digital Filter
        5. 7.3.5.5 ADC2y Offset and Gain Calibration
        6. 7.3.5.6 ADC2y Sequencer
        7. 7.3.5.7 VCMy Buffers
        8. 7.3.5.8 ADC2y Measurement Configurations
        9. 7.3.5.9 ADC2y Conversion Data
      6. 7.3.6 ADC3y
      7. 7.3.7 General-Purpose Digital Inputs and Outputs (GPIO0 to GPIO4)
        1. 7.3.7.1 GPIOx PWM Output Configuration
        2. 7.3.7.2 GPIOx PWM Input Readback
      8. 7.3.8 General-Purpose Digital Inputs and Outputs (GPIO0A, GPIO1A, GPIO0B, GPIO1B)
      9. 7.3.9 Monitors and Diagnostics
        1. 7.3.9.1  Supply Monitors
        2. 7.3.9.2  Clock Monitors
        3. 7.3.9.3  Digital Monitors
          1. 7.3.9.3.1 Register Map CRC
          2. 7.3.9.3.2 Memory Map CRC
          3. 7.3.9.3.3 GPIO Readback
        4. 7.3.9.4  Communication Monitors
        5. 7.3.9.5  Fault Flags and Fault Masking
        6. 7.3.9.6  FAULT Pin
        7. 7.3.9.7  Diagnostics and Diagnostic Procedure
        8. 7.3.9.8  Indicators
        9. 7.3.9.9  Conversion and Sequence Counters
        10. 7.3.9.10 Supply Voltage Readback
        11. 7.3.9.11 Temperature Sensors (TSA, TSB)
        12. 7.3.9.12 Test DACs (TDACA, TDACB)
        13. 7.3.9.13 Open-Wire Detection
        14. 7.3.9.14 Missing Host Detection and MHD Pin
        15. 7.3.9.15 Overcurrent Comparators (OCCA, OCCB)
          1. 7.3.9.15.1 OCCA and OCCB Pins
          2. 7.3.9.15.2 Overcurrent Indication Response Time
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-Up and Reset
        1. 7.4.1.1 Power-On Reset (POR)
        2. 7.4.1.2 RESETn Pin
        3. 7.4.1.3 RESET Command
      2. 7.4.2 Operating Modes
        1. 7.4.2.1 Active Mode
        2. 7.4.2.2 Standby Mode
        3. 7.4.2.3 Power-Down Mode
      3. 7.4.3 ADC Conversion Modes
        1. 7.4.3.1 ADC1y and ADC3y Conversion Modes
          1. 7.4.3.1.1 Continuous-Conversion Mode
          2. 7.4.3.1.2 Single-Shot Conversion Mode
          3. 7.4.3.1.3 Global-Chop Mode
            1. 7.4.3.1.3.1 Overcurrent Indication Response Time in Global-Chop Mode
        2. 7.4.3.2 ADC2y Sequencer Operation and Sequence Modes
          1. 7.4.3.2.1 Continuous Sequence Mode
          2. 7.4.3.2.2 Single-Shot Sequence Mode
          3. 7.4.3.2.3 Synchronized Single-Shot Sequence Mode Based on ADC1y Conversion Starts
    5. 7.5 Programming
      1. 7.5.1 Serial Interface
        1. 7.5.1.1 Serial Interface Signals
          1. 7.5.1.1.1 Chip Select (CSn)
          2. 7.5.1.1.2 Serial Data Clock (SCLK)
          3. 7.5.1.1.3 Serial Data Input (SDI)
          4. 7.5.1.1.4 Serial Data Output (SDO)
          5. 7.5.1.1.5 Data Ready (DRDYn)
        2. 7.5.1.2 Serial Interface Communication Structure
          1. 7.5.1.2.1 SPI Communication Frames
          2. 7.5.1.2.2 SPI Communication Words
          3. 7.5.1.2.3 STATUS Word
          4. 7.5.1.2.4 Communication Cyclic Redundancy Check (CRC)
          5. 7.5.1.2.5 Commands
            1. 7.5.1.2.5.1 NULL (0000 0000 0000 0000b)
            2. 7.5.1.2.5.2 RESET (0000 0000 0001 0001b)
            3. 7.5.1.2.5.3 LOCK (0000 0101 0101 0101b)
            4. 7.5.1.2.5.4 UNLOCK (0000 0110 0101 0101b)
            5. 7.5.1.2.5.5 WREG (011a aaaa aaa0 0nnnb)
            6. 7.5.1.2.5.6 RREG (101a aaaa aaan nnnnb)
          6. 7.5.1.2.6 SCLK Counter
          7. 7.5.1.2.7 SPI Timeout
          8. 7.5.1.2.8 Reading ADC1A, ADC1B, ADC2A, ADC2B, ADC3A, and ADC3B Conversion Data
          9. 7.5.1.2.9 DRDYn Pin Behavior
  9. 8 Register Map
    1. 8.1 Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Unused Inputs and Outputs
      2. 9.1.2 Minimum Interface Connections
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Current-Shunt Measurement
        2. 9.2.2.2 Battery-Pack Voltage Measurement
        3. 9.2.2.3 Other Voltage Measurements
        4. 9.2.2.4 Shunt Temperature Measurement
        5. 9.2.2.5 Analog Output Temperature Sensor Measurement
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Power-Supply Options
        1. 9.3.1.1 Single Unregulated External 4-V to 16-V Supply (3.3-V Digital I/O Levels)
        2. 9.3.1.2 Single Regulated External 3.3-V Supply (3.3-V Digital IO Levels)
        3. 9.3.1.3 Single Regulated External 5-V Supply (5-V Digital I/O Levels)
      2. 9.3.2 Power-Supply Sequencing
      3. 9.3.3 Power-Supply Decoupling
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

5.9 Typical Characteristics

at TA = 25°C, APWR = 5 V, DPWR = 5 V, and external clock with fCLK = 8.192 MHz (unless otherwise noted)

ADS131B26-Q1 ADC1y Offset Error Histogram
32 devices, gain = 8, global-chop disabled, input referred
Figure 5-2 ADC1y Offset Error Histogram
ADS131B26-Q1 ADC1y Offset Error Histogram
32 devices, gain = 8, global-chop enabled, input referred
Figure 5-4 ADC1y Offset Error Histogram
ADS131B26-Q1 ADC1y Gain Error Histogram
32 devices, gain = 4, including error of REFy
Figure 5-6 ADC1y Gain Error Histogram
ADS131B26-Q1 ADC2y Offset Error Histogram
32 devices, gain = 1, input referred
Figure 5-8 ADC2y Offset Error Histogram
ADS131B26-Q1 ADC2y Gain Error Histogram
32 devices, gain = 1, including error of REFy
Figure 5-10 ADC2y Gain Error Histogram
ADS131B26-Q1 ADC3y Offset Error Histogram
32 devices, gain = 1, global-chop disabled, input referred
Figure 5-12 ADC3y Offset Error Histogram
ADS131B26-Q1 ADC3y Offset Error Histogram
32 devices, gain = 1, global-chop enabled, input referred
Figure 5-14 ADC3y Offset Error Histogram
ADS131B26-Q1 ADC3y Gain Error Histogram
32 devices, gain = 1, including error of REFy
Figure 5-16 ADC3y Gain Error Histogram
ADS131B26-Q1 REFy Output Voltage Histogram
32 devices 
Figure 5-18 REFy Output Voltage Histogram
ADS131B26-Q1 OSCM and OSCD Frequency Histogram
 32 devices
Figure 5-20 OSCM and OSCD Frequency Histogram
ADS131B26-Q1 OCCy Offset Error Histogram
27 devices, ADC1y gain = 4, input referred
Figure 5-22 OCCy Offset Error Histogram
ADS131B26-Q1 OCCy Gain Error Histogram
32 devices, ADC1y gain = 4, including error of REFy
Figure 5-24 OCCy Gain Error Histogram
ADS131B26-Q1 Temperature Sensor Output Voltage Histogram
28 devices
Figure 5-26 Temperature Sensor Output Voltage Histogram
ADS131B26-Q1 Test DACy Output Voltage Histogram
TDACy output voltage = 9 × VREFy / 40
Figure 5-28 Test DACy Output Voltage Histogram
ADS131B26-Q1 Test DACy Output Voltage Histogram
 TDACy output voltage = –9 × VREFy / 40 
Figure 5-30 Test DACy Output Voltage Histogram
ADS131B26-Q1 ADC2y Supply Voltage Readback Measurement Accuracy
APWR or DPWR
Figure 5-32 ADC2y Supply Voltage Readback Measurement Accuracy
ADS131B26-Q1 Analog GPIO Pin Output Voltage vsSinking Current
AVDD = 3.3 V
Figure 5-34 Analog GPIO Pin Output Voltage vs
Sinking Current
ADS131B26-Q1 Digital Pin Output Voltage vs Sinking Current
IOVDD = 3.3 V
Figure 5-36 Digital Pin Output Voltage vs Sinking Current
ADS131B26-Q1 VCMy Output Voltage vs Temperature
 
Figure 5-38 VCMy Output Voltage vs Temperature
ADS131B26-Q1 AVDD and IOVDD LDO Output Voltage vs Temperature
 
Figure 5-40 AVDD and IOVDD LDO Output Voltage vs Temperature
ADS131B26-Q1 Supply Current vs Supply Voltage
Active mode, all ADCs enabled and converting
Figure 5-42 Supply Current vs Supply Voltage
ADS131B26-Q1 ADC1y Offset Error vs Temperature
Global-chop disabled, input referred
Figure 5-3 ADC1y Offset Error vs Temperature
ADS131B26-Q1 ADC1y Offset Error vs Temperature
Global-chop enabled, input referred
Figure 5-5 ADC1y Offset Error vs Temperature
ADS131B26-Q1 ADC1y Gain Error vs Temperature
Including error of REFy
Figure 5-7 ADC1y Gain Error vs Temperature
ADS131B26-Q1 ADC2y Offset Error vs Temperature
Input referred
Figure 5-9 ADC2y Offset Error vs Temperature
ADS131B26-Q1 ADC2y Gain Error vs Temperature
Including error of REFy
Figure 5-11 ADC2y Gain Error vs Temperature
ADS131B26-Q1 ADC3y Offset Error vs Temperature
Global-chop disabled, input referred
Figure 5-13 ADC3y Offset Error vs Temperature
ADS131B26-Q1 ADC3y Offset Error vs Temperature
Global-chop enabled, input referred
Figure 5-15 ADC3y Offset Error vs Temperature
ADS131B26-Q1 ADC3y Gain Error vs Temperature
Including error of REFy
Figure 5-17 ADC3y Gain Error vs Temperature
ADS131B26-Q1 REFy Output Voltage vs Temperature
 
Figure 5-19 REFy Output Voltage vs Temperature
ADS131B26-Q1 OSCM and OSCD Frequency vs Temperature
 
Figure 5-21 OSCM and OSCD Frequency vs Temperature
ADS131B26-Q1 OCCy Offset Error vs Temperature
Input referred
Figure 5-23 OCCy Offset Error vs Temperature
ADS131B26-Q1 OCCy Gain Error vs Temperature
Including error of REFy
Figure 5-25 OCCy Gain Error vs Temperature
ADS131B26-Q1 Temperature Sensor Measurement Error vs Ambient Temperature
 
Figure 5-27 Temperature Sensor Measurement Error vs Ambient Temperature
ADS131B26-Q1 Test DACy Output Voltage vs Temperature
TDACy output voltage = 9 × VREFy / 40 
Figure 5-29 Test DACy Output Voltage vs Temperature
ADS131B26-Q1 Test DACy Output Voltage vs Temperature
TDACy output voltage = –9 × VREFy / 40 
Figure 5-31 Test DACy Output Voltage vs Temperature
ADS131B26-Q1 ADC2y Supply Voltage Readback Measurement Accuracy
AVDD or IOVDD
Figure 5-33 ADC2y Supply Voltage Readback Measurement Accuracy
ADS131B26-Q1 Analog GPIO Pin Output Voltage vsSourcing Current
AVDD = 3.3 V
Figure 5-35 Analog GPIO Pin Output Voltage vs
Sourcing Current
ADS131B26-Q1 Digital Pin Output Voltage vs Sourcing Current
IOVDD = 3.3 V
Figure 5-37 Digital Pin Output Voltage vs Sourcing Current
ADS131B26-Q1 AVDD and IOVDD LDO Output Voltage Histogram
32 devices
Figure 5-39 AVDD and IOVDD LDO Output Voltage Histogram
ADS131B26-Q1 Supply Current vs Temperature
Active mode, all ADCs enabled and converting
Figure 5-41 Supply Current vs Temperature