SBAU366B January   2021  – October 2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Device Information
  8. 2Hardware
    1. 2.1 Required Hardware
    2. 2.2 Hardware Setup
  9. 3Software
    1. 3.1 Required Software
    2. 3.2 Software Setup
  10. 4Setup Procedure
    1. 4.1 Setting up the ADC3683EVM
    2. 4.2 Setting up the ADC3664EVM
    3. 4.3 Setting up the ADC3663EVM
  11. 5Hardware Design Files
  12. 6Additional Information
    1. 6.1 Trademarks
  13. 7References
  14. 8Revision History

4.3 Setting up the ADC3663EVM

  1. Verify that the software is set up according to the Software Setup section.
  2. Verify that the hardware is set up according to the Hardware Setup section
  3. To provide the CLK signal:
    1. Using an SMA cable and an inline 65MHz band pass filter, connect the signal generator to the CLKn SMA connector (J5) on the ADC3663EVM.
    2. Set the signal generator’s output signal frequency to 65MHz and the signal amplitude to +10dBm.
  4. By default, the EVM is configured to take a single ended input, so analog inputs must be applied to connectors CHAp (J7) for Channel A or CHBp (J9) for Channel B. To provide an analog input:
    1. Using an SMA cable and an inline 5MHz band pass filter, connect the signal generator to analog input channel A.
    2. Set the signal generator’s output signal frequency to 5.135MHz (prime number) and 0dBm.
  5. To provide a DCLK signal:
    1. Using an SMA cable, connect the signal generator to the DCLKIN SMA connector (J6).
    2. Set the signal generator’s output frequency to 260MHz (16-bit, 2-wire, DDC bypass) and the signal amplitude to +2dBm.
  6. Verify that all signal generators for clock, analog input and DCLK are referenced locked using the 10MHz REF on the back of the signal generators. For an example of this, please see figure below.
    ADC3663EVM, ADC3664EVM, ADC3683EVM Basic Test Measurement Setup Figure 4-19 Basic Test Measurement Setup
  7. Your setup now looks like the following:
    ADC3663EVM, ADC3664EVM, ADC3683EVM ADC3663EVM Hardware Setup Figure 4-20 ADC3663EVM Hardware Setup
  8. Open HSDC Pro. Always Verify that that HSDC Pro is open before opening the ADC36xxEVM GUI.
  9. Select on cancel when prompted to connect to a board. The GUI handles all of the other HSDC Pro capture and configuration related operations.
    ADC3663EVM, ADC3664EVM, ADC3683EVM HSDC Pro Figure 4-21 HSDC Pro
  10. Open the ADC36xxEVM GUI. Allow a few seconds for the GUI to connect to the TSWDC155EVM FPGA Capture board. The TSWDC155EVM powers on, and several LEDs become illuminated, as shown below.
    ADC3663EVM, ADC3664EVM, ADC3683EVM TSWDC155EVM powered on Figure 4-22 TSWDC155EVM powered on
  11. When the GUI window has opened, you can configure the GUI into your desired mode. By default, the GUI is configured in 2-wire, bypass mode. These two defaults can remain the same. You need to set the variant to ADC3663, resolution to 16-bit, and the Clocking Sample Frequency to 65MHz.
    ADC3663EVM, ADC3664EVM, ADC3683EVM ADC36xx LVDS GUI Default With ADC3663 Configuration Figure 4-23 ADC36xx LVDS GUI Default With ADC3663 Configuration
  12. Once the ADC mode has been selected, select on the “Calculate” button to calculate the necessary DCLK. For this mode, the DCLK must be 260MHz. Verify that this signal is provided to the DCLK input on the hardware setup.
    ADC3663EVM, ADC3664EVM, ADC3683EVM Calculating DCLK Frequency for ADC3663 Figure 4-24 Calculating DCLK Frequency for ADC3663
  13. Select the “Program” button. Allow a few seconds to program the ADC, program the FPGA, and configure the FPGA firmware.
    ADC3663EVM, ADC3664EVM, ADC3683EVM Programming the ADC3663EVM Figure 4-25 Programming the ADC3663EVM
  14. Once programming is complete, select the "Capture" button to take an FFT data capture.
    ADC3663EVM, ADC3664EVM, ADC3683EVM Capturing the FFT Figure 4-26 Capturing the FFT
  15. After a few seconds, the captured data appears in the HSDC Pro window, where you can view the performance of the device. For more functions and features of HSDC Pro, see the HSDC Pro User Guide.
    ADC3663EVM, ADC3664EVM, ADC3683EVM ADC3663EVM FFT Data Capture in HSDC Pro Figure 4-27 ADC3663EVM FFT Data Capture in HSDC Pro
  16. If an error occurs when running the capture function, restart the GUI and follow steps 5-8 again.