SBAU394A April   2022  – September 2022

 

  1.   ADS1285 Evaluation Module
  2.   Trademarks
  3. EVM Overview
    1. 1.1 ADS1285EVM-PDK Kit
  4. ADS1285EVM-PDK Quick-Start Guide
  5. EVM Analog Interface
    1. 3.1 ADC Analog Input Signal Path
    2. 3.2 ADC Input Clock (CLK) Options
  6. Digital Interface
    1. 4.1 Connection to the PHI
    2. 4.2 Digital Header
  7. Power Supplies
  8. Digital-to-Analog Converter
  9. ADS1285EVM-PDK Initial Setup
    1. 7.1 Default Jumper Settings
    2. 7.2 EVM Graphical User Interface (GUI) Software Installation
  10. ADS1285EVM-PDK Software Reference
    1. 8.1 EVM GUI Global Settings for ADC Control
    2. 8.2 Register Map Configuration Tool
    3. 8.3 Time Domain Display Tool
    4. 8.4 Spectral Analysis Tool
    5. 8.5 Histogram Tool
    6. 8.6 DAC Configuration Tool
  11. ADS1285EVM-PDK Bill of Materials, PCB Layout, and Schematics
    1. 9.1 Bill of Materials
    2. 9.2 PCB Layout
    3. 9.3 Schematics
  12. 10References
  13. 11Revision History

Schematics

Figure 9-7 shows a block diagram of the ADS1285EVM-PDK.

Figure 9-7 ADS1285EVM-PDK Block Diagram

Figure 9-8 through Figure 9-13 illustrate various schematics for the ADS1285EVM-PDK ADC.

GUID-20220830-SS0I-KPWZ-KMFJ-9RVRBCKWMXHS-low.gifFigure 9-8 ADS1285EVM-PDK ADC Schematic
GUID-20220830-SS0I-SQMR-WKNG-MNLFTCJSLCFH-low.gifFigure 9-9 ADS1285EVM-PDK Analog Inputs and Common-Mode Buffer Schematic
GUID-20220830-SS0I-GL72-KBQF-QQ516B1J0NVS-low.gifFigure 9-10 ADS1285EVM-PDK Clock and Interface Schematic
GUID-20220913-SS0I-CQW2-CP32-PTP4SKGR2K27-low.gifFigure 9-11 ADS1285EVM-PDK Power-Supply Schematic
GUID-20220830-SS0I-KBJX-C1ZH-RMQT3DCZ8MJL-low.gifFigure 9-12 ADS1285EVM-PDK Reference Voltage Schematic
GUID-20220830-SS0I-WLSR-JPMM-TLRM0VJZ9HW7-low.gifFigure 9-13 ADS1285EVM DAC Schematic