SBAU402 april   2023

 

  1.   AMC131M03 Evaluation Module
  2.   Trademarks
  3. 1Introduction
    1. 1.1 AMC131M03EVM Kit
    2. 1.2 AMC131M03EVM Board
  4. 2EVM Analog Interface
    1. 2.1 ADC Analog Input Signal Path
    2. 2.2 ADC External Clock (CLKIN) Options
  5. 3Digital Interface
    1. 3.1 SPI Communication
    2. 3.2 Connection to the PHI
    3. 3.3 Digital Header
  6. 4Power Supplies
  7. 5AMC131M03EVM Initial Setup
    1. 5.1 Default Jumper Settings
    2. 5.2 EVM Graphical User Interface (GUI) Software Installation
  8. 6AMC131M03EVM Operation
    1. 6.1 EVM GUI Global Settings for ADC Control
    2. 6.2 Register Map Configuration Tool
    3. 6.3 Time Domain Display Tool
    4. 6.4 Spectral Analysis Tool
    5. 6.5 Histogram Tool
  9. 7AMC131M03EVM Bill of Materials, PCB Layout, and Schematic
    1. 7.1 PCB Layout
    2. 7.2 Schematics
    3. 7.3 Bill of Materials

4 Power Supplies

The PHI provides multiple power-supply options for the EVM, derived from the USB supply of the computer.

The EEPROM on the AMC131M03EVM uses a 3.3-V power supply generated directly by the PHI. The low-side analog and digital supply (DVDD) of the ADC uses a 3.3-V power supply provided directly by a low-dropout (LDO) regulator on the PHI.

The power supply for each active component on the EVM is bypassed with a ceramic capacitor placed close to that component. Additionally, the EVM layout uses thick traces or large copper fill areas, where possible, between bypass capacitors and their loads to minimize inductance along the load current path.

As mentioned previously in Section 1, power to the EVM is supplied by the PHI through connector J6. For information about PHI pins and the power connections, see Table 3-1.

With modifications, the user can use external supplies for the low-side analog and digital supply (DVDD) of the ADC. DVDD can be driven externally from the terminal block J4.