SBAU431A July   2024  – October 2026

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Performance Development Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1  EVM Analog Input Options
    2. 2.2  Common-Mode Amplifier
    3. 2.3  Analog Input Circuit
    4. 2.4  RTD Current Source
    5. 2.5  Voltage Reference
    6. 2.6  ADC Connections and Decoupling
    7. 2.7  Power Supplies
    8. 2.8  SYNC / Clock Divide Circuit
    9. 2.9  Clocking
    10. 2.10 Serial Interface
    11. 2.11 EEPROM
    12. 2.12 Using the ADS1282EVM With an External Controller
  9. 3Software
    1. 3.1 Software Description
    2. 3.2 ADS1282 EVM Software Installation
  10. 4Implementation Results
    1. 4.1 EVM Operation
      1. 4.1.1 Evaluation Setup
      2. 4.1.2 EVM Register Settings
        1. 4.1.2.1 Channel Configuration
        2. 4.1.2.2 PGA Gain Selection
        3. 4.1.2.3 Data Rate Configuration
      3. 4.1.3 Time Domain Display
      4. 4.1.4 Spectral Analysis Display
      5. 4.1.5 Histogram Analysis Display
      6. 4.1.6 GUI Data Export
  11. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  12. 6Additional Information
    1. 6.1 Trademarks
  13. 7Related Documentation
    1. 7.1 Supplemental Content
  14. 8Revision History

4.1.2 EVM Register Settings

Figure 4-3 shows the ADC register settings. Modify the registers to enable different device modes (such as filter settings and synchronization settings). Access this page by selecting Register Map Config under Pages on the left side of the GUI.

ADS1282V2EVM-PDK EVM Register ConfigurationFigure 4-3 EVM Register Configuration