SBAU441B March   2024  – October 2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications and Device Information
  8. 2Hardware
    1. 2.1 Board Overview
    2. 2.2 Required Equipment
    3. 2.3 Hardware Setup
  9. 3Software
    1. 3.1 Required Software
    2. 3.2 Software Setup
    3. 3.3 Using the GUI
  10. 4Hardware Design Files
  11. 5Additional Information
    1. 5.1 Trademarks
    2. 5.2 References
  12. 6Revision History

1.1 Introduction

The ADC3669EVM allows for evaluation of all the devices in the ADC3669 family, as the variants are all pin-to-pin compatible. The ADC3669EVM is populated with an ADC3669, which can be configured to emulate the other variants in the device family. These devices include:

  • ADC3669 (dual channel, 16-bit, 500MSPS)
  • ADC3668 (dual channel, 16-bit, 250MSPS)
  • ADC3649 (dual channel, 14-bit, 500MSPS)
  • ADC3648 (dual channel, 14-bit, 250MSPS)
  • ADC3569 (single channel, 16-bit, 500MSPS)
  • ADC3568 (single channel, 16-bit, 250MSPS)
  • ADC3549 (single channel, 14-bit, 500MSPS)
  • ADC3548 (single channel, 14-bit, 250MSPS)

The EVM is configured to receive external single-ended analog inputs and includes baluns for single-ended to differential conversion. The sample clock is sourced externally and is single-ended.

For data capture, the ADC3669EVM is paired with the TSWDC155EVM. The TSWDC155EVM is an FPGA data capture card which features the AMD Artix-7 FPGA. The ADC data, captured by the FPGA, is then transferred to the PC and displayed in the HSDC Pro capture software.