SBOS550C February   2011  – May 2026 TXS4555

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Description
  4. 3Pin Configuration and Functions
  5. 4Specifications
    1. 4.1  Absolute Maximum Ratings
    2. 4.2  ESD Ratings
    3. 4.3  Thermal Information
    4. 4.4  Recommended Operating Conditions
    5. 4.5  Electrical Characteristics – Level Translator
    6. 4.6  LDO Electrical Characteristics
    7. 4.7  General Electrical Characteristics
    8. 4.8  Switching Characteristics
    9. 4.9  Operating Characteristics
    10. 4.10 Typical Characteristics
  6. 5Detailed Description
    1. 5.1 Functional Block Diagram
  7. 6Application and Implementation
    1. 6.1 Application Information
      1. 6.1.1 Input And Output Capacitor Requirements
      2. 6.1.2 Output Noise
      3. 6.1.3 Internal Current Limit
      4. 6.1.4 Dropout Voltage
      5. 6.1.5 Startup
      6. 6.1.6 Transient Response
      7. 6.1.7 Minimum Load
      8. 6.1.8 Thermal Information
        1. 6.1.8.1 Thermal Protection
  8. 7Device and Documentation Support
    1. 7.1 Receiving Notification of Documentation Updates
    2. 7.2 Support Resources
    3. 7.3 Trademarks
    4. 7.4 Electrostatic Discharge Caution
    5. 7.5 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

3 Pin Configuration and Functions

TXS4555 RGT Package(1)16-Pin VQFN With Exposed Thermal PadTop View
A. The exposed center thermal pad must be connected to Ground.
Figure 3-1 RGT Package(1)16-Pin VQFN With Exposed Thermal PadTop View
TXS4555 RUT Package12-Pin UQFNTop View Figure 3-2 RUT Package12-Pin UQFNTop View
Table 3-1 Pin Functions
NAME NO. TYPE(1) DESCRIPTION
RGT RUT
CLK 13 8 I Clock signal pin connected from baseband processor
EN 1 11 I Enable and disable control input. Pull EN low to place all outputs in Hi-Z state
and to disable the LDO. Referenced to VCC.
GND 10 6 — Ground
I/O 15 10 I/O Bidirectional SIM I/O pin which connected from baseband processor
NC 4, 6, 12, 16 – — No internal connection
RST 14 9 I SIM reset pin connected from baseband processor
SEL 2 12 I Pin to program VSIM value (Low = 1.8 V, High = 2.95 V)
SIM_CLK 11 7 O Clock signal pin connects to CLK pin of the SIM card connector
SIM_I/O 8 4 I/O Bidirectional SIM I/O pin connects to I/O pin of the SIM card connector
SIM_RST 9 5 O SIM reset pin connects to RESET pin of the SIM card connector
VBATT 5 2 P Battery power supply
VCC 3 1 P Power supply voltage that powers all A-port I/Os and control inputs
VSIM 7 3 O SIM card power-supply pin (1.8V or 2.95 V)
(1) G = Ground, I = Input, O = Output, P = Power