SBOSAC3B July   2023  – August 2025 INA745A , INA745B

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements (I2C)
    7. 5.7 Timing Diagram
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Integrated Shunt Resistor
      2. 6.3.2 Safe Operating Area
      3. 6.3.3 Versatile Measurement Capability
      4. 6.3.4 Internal Measurement and Calculation Engine
      5. 6.3.5 High-Precision Delta-Sigma ADC
        1. 6.3.5.1 Low Latency Digital Filter
        2. 6.3.5.2 Flexible Conversion Times and Averaging
      6. 6.3.6 Integrated Precision Oscillator
      7. 6.3.7 Multi-Alert Monitoring and Fault Detection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Shutdown Mode
      2. 6.4.2 Power-On Reset
    5. 6.5 Programming
      1. 6.5.1 I2C Serial Interface
        1. 6.5.1.1 Writing to and Reading Through the I2C Serial Interface
        2. 6.5.1.2 High-Speed I2C Mode
        3. 6.5.1.3 SMBus Alert Response
  8. 7 Register Maps
    1. 7.1 INA745x Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Device Measurement Range and Resolution
      2. 8.1.2 ADC Output Data Rate and Noise Performance
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Configure the Device
        2. 8.2.2.2 Set Desired Fault Thresholds
        3. 8.2.2.3 Calculate Returned Values
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

8.1.1 Device Measurement Range and Resolution

The INA745x has a full scale ADC range for current measurements of ±39.32A. However, the maximum value that can be measured is limited by the operating junction temperature (see Figure 8-1).

INA745A INA745B Maximum ADC Current Reading vs Junction Temperature (Typical Characteristic)Figure 8-1 Maximum ADC Current Reading vs Junction Temperature (Typical Characteristic)

Table 8-4 shows the full scale value for shunt, bus, and temperature measurements, along with the associated step size.

Table 8-1 Register Full Scale Values and Resolution
PARAMETERREGISTER ADDRESS

SIZE

FULL SCALE VALUERESOLUTION
Current7h16 bit, signed±39.32A1.2mA/LSB
Bus voltage5h16 bit, signed, always positive0V to 40V3.125mV/LSB
Die Temperature6h12 bit, signed–40°C to 150°C125m°C/LSB
Power8h24 bit, unsigned4026.53W240µW/LSB
Energy9h40 bit, unsigned4222.125MJ3.840mJ/LSB
ChargeAh40 bit, unsigned82.463MC75µC/LSB

The internal die temperature sensor register range extends from –256°C to 256°C but is limited by the junction temperature range of –40°C to 150°C. Likewise, the bus voltage measurement range extends up to 102.4V but is limited by silicon to 40V.

Current, bus voltage, temperature, power, energy and charge measurements can be read through the corresponding address registers. Values are calculated by multiplying the returned value by the corresponding LSB size.

Signed values are represented in 2's complement format.

Upon overflow, the ENERGY register rolls over and starts from zero. This register value can also be reset at any time by setting the RSTACC bit in the CONFIG register.

An overflow event in the CHARGE register is indicated by the CHARGEOF bit. If an overflow condition occurs, the CHARGE register needs to be manually reset by setting the RSTACC bit in the CONFIG register.

For a design example using these equations refer to Detailed Design Procedure.