Similar to all high-speed devices, best system performance is achieved with close attention to board layout. The DEM-FDA-DGK-EVM user's guide provides a good example of high-frequency layout techniques as a reference. This EVM includes numerous extra elements and features for characterization purposes that do not apply to some applications. General high-speed signal path layout suggestions include:

• Continuous ground planes are preferred for signal routing with matched impedance traces for longer runs; however, both ground and power planes must be opened up around the capacitive sensitive input and output device pins. When the signal goes to a resistor, parasitic capacitance becomes more of a band-limiting issue and less of a stability issue.
• Good high-frequency decoupling capacitors (0.1µF) are required to a ground plane at the device power pins. Additional higher-value capacitors (2.2µF) are also required but can be placed further from the device power pins and shared among devices. For best high-frequency decoupling, consider X2Y supply decoupling capacitors that offer a much higher self-resonance frequency over standard capacitors.
• Differential signal routing over any appreciable distance must use microstrip layout techniques with matched impedance traces.
• The input summing junctions are very sensitive to parasitic capacitance. Any R_G elements must connect into the summing junction with minimal trace length to the device pin side of the resistor. The other side of the R_G elements can have more trace length if needed to the source or to GND.