SBOSAK6A June   2025  – December 2025 THS4535

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Common-Mode
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-Down Mode
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Output Common-Mode Voltage
        1. 8.1.1.1 Resistor Matching
      2. 8.1.2 Data Converters
      3. 8.1.3 Single-Supply Applications
    2. 8.2 Typical Application
      1. 8.2.1 Typical Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Board Layout Recommendations
      2. 8.4.2 Layout Examples
  10. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Detailed Design Procedure

The configuration shown in Figure 8-4 creates a differential gain of 3, while maintaining a balanced output at the middle of the ADC range. The differential gain (AV_DIFF) is set by the ratio of the input resistors, RIN = 333Ω, and the feedback resistors, RFB = 1kΩ, for a total of 3V/V. The output common-mode is shifted to whatever voltage is specified on the VOUTCM pin, which is ½ the ADC reference (1.65V for this example). The inherent architecture of the FDA makes two signals that are 180° out of phase with a maximum and minimum range of 0.15V to 3.15V. The total range of the ADC is not used in this example to provide headroom for the ADC or output range of the FDA if running on a 3.3V supply, but an alternative gain can be used to get an exact peak-to-peak voltage to match the ADC, if desired.

An alternative design to the FDA is a dual amplifier used in a two-op-amp instrumentation amplifier configuration. This design uses two amplifiers: one amplifier in a noninverting configuration that gains up the input signal, and one amplifier in an inverting configuration that inverts the output of the first amplifier. Figure 8-5 shows there are some sizable downsides to this approach. First, the output common-mode voltage depends on the input common-mode voltage because the noninverting amplifier's output common-mode is dependent on the input common-mode voltage. This design shortcoming can be remedied by changing the dc bias of the gain resistor for the noninverting amplifier, as shown in Figure 8-5 with -0.875V, but an additional bias voltage is required. Failure to shift the output common-mode voltage correctly can result in signal loss due to output clipping on the noninverting amplifier when the input voltage is close to the negative rail. Second, there is a phase imbalance between the noninverting amplifier and the inverting amplifiers in this circuit. As more gain is required of this circuit, the noninverting amplifier gets slower as the gain increases while the inverting amplifier gain stays the same. Such gain and phase imbalances potentially manifest as distortion errors, limit signal bandwidth, and are often exacerbated with loading.

THS4535 Dual Amplifier Single-to-Dual
          Conversion Figure 8-5 Dual Amplifier Single-to-Dual Conversion