SBOSAM6 January   2000  – December 2024 LMC6035-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Capacitive Load Tolerance
    2. 7.2 Typical Applications
      1. 7.2.1 Differential Driver
      2. 7.2.2 Low-Pass Active Filter
        1. 7.2.2.1 Low-Pass Frequency Scaling Procedure
      3. 7.2.3 High-Pass Active Filter
        1. 7.2.3.1 High-Pass Frequency Scaling Procedure
      4. 7.2.4 Dual-Amplifier Bandpass Filter
        1. 7.2.4.1 DABP Component Selection Procedure
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
        1. 7.3.1.1 Printed Circuit Board (PCB) Layout for High-Impedance Work
      2. 7.3.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3.     Trademarks
    4. 8.3 Electrostatic Discharge Caution
    5. 8.4 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

4 Pin Configuration and Functions

LMC6035-Q1 D Package, 8-Pin SOIC (Top View) Figure 4-1 D Package, 8-Pin SOIC (Top View)
Table 4-1 Pin Functions: D Package
PIN TYPE DESCRIPTION
NAME NO.
–IN A 2 Input Inverting input channel A
–IN B 6 Input Inverting input channel B
+IN A 3 Input Noninverting input channel A
+IN B 5 Input Noninverting input channel B
OUT A 1 Output Output channel A
OUT B 7 Output Output channel B
V– 4 Power Negative supply
V+ 8 Power Positive supply