SBVS263B
July 2017 – June 2025
TPS7A39
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Start-Up Characteristics
5.7
Timing Diagram
5.8
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Voltage Regulation
6.3.1.1
DC Regulation
6.3.1.2
AC and Transient Response
6.3.2
User-Settable Buffered Reference
6.3.3
Active Discharge
6.3.4
System Start-Up Controls
6.3.4.1
Start-Up Tracking
6.3.4.2
Sequencing
6.3.4.2.1
Enable (EN)
6.3.4.2.2
Undervoltage Lockout (UVLO) Control
6.4
Device Functional Modes
6.4.1
Normal Operation
6.4.2
Dropout Operation
6.4.3
Disabled
7
Application and Implementation
7.1
Application Information
7.1.1
Setting the Output Voltages on Adjustable Devices
7.1.2
Capacitor Recommendations
7.1.3
Input and Output Capacitor (CINx and COUTx)
7.1.4
Feed-Forward Capacitor (CFFx)
7.1.5
Noise-Reduction and Soft-Start Capacitor (CNR/SS)
7.1.6
Buffered Reference Voltage
7.1.7
Overriding Internal Reference
7.1.8
Start-Up
7.1.8.1
Soft-Start Control (NR/SS)
7.1.8.1.1
In-Rush Current
7.1.8.2
Undervoltage Lockout (UVLOx) Control
7.1.9
AC and Transient Performance
7.1.9.1
Power-Supply Rejection Ratio (PSRR)
7.1.9.2
Channel-to-Channel Output Isolation and Crosstalk
7.1.9.3
Output Voltage Noise
7.1.9.4
Optimizing Noise and PSRR
7.1.9.5
Load Transient Response
7.1.10
DC Performance
7.1.10.1
Output Voltage Accuracy (VOUT x)
7.1.10.2
Dropout Voltage (VDO)
7.1.11
Reverse Current
7.1.12
Power Dissipation (PD)
7.1.12.1
Estimating Junction Temperature
7.2
Typical Applications
7.2.1
Design 1: Single-Ended to Differential Isolated Supply
7.2.1.1
Design Requirements
7.2.1.2
Detailed Design Procedure
7.2.1.2.1
Switcher Choice
7.2.1.2.2
Full Bridge Rectifier With Center-Tapped Transformer
7.2.1.2.3
Total Solution Efficiency
7.2.1.2.4
Feedback Resistor Selection
7.2.1.3
Application Curves
7.2.2
Design 2: Getting the Full Range of a SAR ADC
7.2.2.1
Design Requirements
7.2.2.2
Detailed Design Procedure
7.2.2.3
Detailed Design Description
7.2.2.3.1
Regulation of –0.2V
7.2.2.3.2
Feedback Resistor Selection
7.2.2.4
Application Curves
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.1.1
Board Layout Recommendations to Improve PSRR and Noise Performance
7.4.1.2
Package Mounting
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Device Support
8.1.1
Development Support
8.1.1.1
Evaluation Modules
8.1.1.2
Spice Models
8.2
Documentation Support
8.2.1
Related Documentation
8.3
Receiving Notification of Documentation Updates
8.4
Support Resources
8.5
Trademarks
8.6
Electrostatic Discharge Caution
8.7
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
1
Features
Positive and negative LDOs in one package
Wide input voltage range: ±3.3V to ±33V
Wide output voltage range:
Positive range: 1.2V to 30V
Negative range: –30V to 0V
Output current: 150mA per channel
Monotonic start-up tracking
High power-supply rejection ratio (PSRR):
69dB (120Hz)
≥ 50dB (10Hz to 2MHz)
Output voltage noise: 21µV
RMS
(10Hz–100kHz)
Buffered 1.2V reference output
Stable with a 10µF or larger output capacitor
Single positive-logic enable
Adjustable soft-start in-rush control
3mm × 3mm, 10-pin WSON package
Low thermal resistance: R
θJA
= 44.4°C/W
Operating temperature range: –40°C to +125°C