SCAS585R November   1996  – May 2026 SN74LVCC3245A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Operating Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 A Port (VCCA = 2.5V ± 0.2V and VCCB = 3.3V ± 0.3V)
    2. 6.2 B Port (VCCA = 2.5V ± 0.2V and VCCB = 3.3V ± 0.3V)
    3. 6.3 B Port (VCCA = 3.6V and VCCB = 5.5V)
    4. 6.4 A and B Port (VCCA and VCCB = 3.6V)
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Glitch-free Power Supply Sequencing
    5. 7.5 VCC Isolation and VCC Disconnect
    6. 7.6 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
      3. 8.4.3 Power-Up Considerations
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.4 Glitch-free Power Supply Sequencing

Either supply rail can be powered on or off in any order without producing a glitch on the I/Os (that is, where the output erroneously transitions to VCC when it must be held low or vice versa). Glitches of this nature can be misinterpreted by a peripheral as a valid data bit, which could trigger a false device reset of the peripheral, a false device configuration of the peripheral, or even a false data initialization by the peripheral.