SCDA060 May   2025 CD4053B

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Demultiplexing Application Example in Solar System
    2. 1.2 Application Issue of Unwanted Voltage at OFF Channels
  5. 2OFF Channel Model Analysis
    1. 2.1 Channel Structure
    2. 2.2 Equivalent Resistor Model
  6. 3Fix OFF Channel Output Voltage to Ground
    1. 3.1 Pull-down Resistor
    2. 3.2 Pull-down Capacitor
    3. 3.3 Bleeder Resistor With a Switch
  7. 4Test and Measurement
    1. 4.1 Measurement Considerations
    2. 4.2 Test Result
  8. 5Summary
  9. 6References

Test Result

Figure 4-4 and Figure 4-5 show the voltage readings with oscilloscope and multimeter at OFF-channel output and unity gain buffer output with no pull-down design added. VDD equals to 5V and VSS equals to 0V. The readings are quite different at the OFF-channel output due to the loading effect of test equipment. By changing the measurement point at unity gain buffer output, such effect can be eliminated with around 1V DC voltage read by both instruments. The voltage ripple is due to 50Hz line frequency interference.

 Improper Voltage Reading at OFF-channel OutputFigure 4-4 Improper Voltage Reading at OFF-channel Output
 Correct Voltage Reading at Unity Gain Buffer OutputFigure 4-5 Correct Voltage Reading at Unity Gain Buffer Output

Figure 4-6 and Figure 4-7 show the test results with pull-down resistor and capacitor designs deployed. With 2.5V input voltage, the output of unity gain buffer linked to ON channel is 2.5V, and the output of unity gain buffer output linked to OFF channel is nearly 0V.

 Voltage Reading With 1MΩ Pull-down Resistor DesignFigure 4-6 Voltage Reading With 1MΩ Pull-down Resistor Design
 Voltage Reading With 1 uF Pull-down Capacitor DesignFigure 4-7 Voltage Reading With 1 uF Pull-down Capacitor Design