SCDA060 May   2025 CD4053B

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Demultiplexing Application Example in Solar System
    2. 1.2 Application Issue of Unwanted Voltage at OFF Channels
  5. 2OFF Channel Model Analysis
    1. 2.1 Channel Structure
    2. 2.2 Equivalent Resistor Model
  6. 3Fix OFF Channel Output Voltage to Ground
    1. 3.1 Pull-down Resistor
    2. 3.2 Pull-down Capacitor
    3. 3.3 Bleeder Resistor With a Switch
  7. 4Test and Measurement
    1. 4.1 Measurement Considerations
    2. 4.2 Test Result
  8. 5Summary
  9. 6References

2 OFF Channel Model Analysis

Analog multiplexers or demultiplexers are essentially combination of switches. The design of CD4053B is based on transmission gate switch. As shown in Figure 2-1, an N-channel transistor and a P-channel transistor are connected in parallel and are controlled by reverse logic so that the transistor can be turned ON or OFF at the same time. Such structure is used because the paralleled ON-state resistance is much flatter across voltage than that of individual transistors, as shown in Figure 2-2. Refer to Selecting the Correct Texas Instruments Signal Switch, application note for more information.

Transmission Gate Switch Figure 2-1 Transmission Gate Switch
On-State Resistance vs Input Voltage for a Parallel n-/p-Channel FET Switch Figure 2-2 On-State Resistance vs Input Voltage for a Parallel n-/p-Channel FET Switch