SCDS423A October   2020  – May 2024 TMUX1575

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
    1.     Pin Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Dynamic Characteristics
    7. 5.7 Timing Requirements
    8. 5.8 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1  On-Resistance
    2. 6.2  Off-Leakage Current
    3. 6.3  On-Leakage Current
    4. 6.4  IPOFF Leakage Current
    5. 6.5  Transition Time
    6. 6.6  tON (EN) and tOFF (EN) Time
    7. 6.7  Break-Before-Make Delay
    8. 6.8  Charge Injection
    9. 6.9  Off Isolation
    10. 6.10 Channel-to-Channel Crosstalk
    11. 6.11 Bandwidth
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Bidirectional Operation
      2. 7.3.2 Beyond Supply Operation
      3. 7.3.3 1.2V Logic Compatible Inputs
      4. 7.3.4 Powered-off Protection
      5. 7.3.5 Fail-Safe Logic
      6. 7.3.6 Integrated Pull-Down Resistors
    4. 7.4 Device Functional Modes
      1. 7.4.1 Truth Tables
  9. 8 Application and Implementation
    1. 8.1 Typical Application
      1. 8.1.1 Design Requirements
      2. 8.1.2 Detailed Design Procedure
    2. 8.2 Power Supply Recommendations
    3. 8.3 Layout
      1. 8.3.1 Layout Guidelines
      2. 8.3.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Mechanical Data

5.5 Electrical Characteristics

VDD = 1.08V to 3.6V, GND = 0V, TA = –40°C to +125°C
Typical values are at VDD = 3.3V, TA = 25°C, (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLY
IDD Active supply current VSEL = 0V, 1.2V or VDD
VS = 0V to 3.6V
TA = –40°C to +85°C		 7 10 µA
IDD Active supply current VSEL = 0V, 1.2V or VDD
VS = 0V to 3.6V
TA = –40°C to +125°C		 7 14 µA
DC CHARACTERISTICS
RON ON-state resistance VS = 0V to VDD
ISD = 8 mA		 1.7 6.5 Ω
RON On-resistance VS = 0V to VDD * 2
VS(max) = 3.6V
ISD = 8 mA		 3 8 Ω
ΔRON On-resistance match between channels VS = VDD
ISD = 8 mA		 0.1 0.4 Ω
RON(FLAT)  On-resistance flatness VS = 0V to VDD
ISD = 8 mA		 1 3.5 Ω
IPOFF Powered-off I/O pin leakage current VDD =  0V
VS =  0V to 3.6V
VD = 0V		 –2 0.01 2 µA
IS(OFF)
ID(OFF) 		OFF leakage current Switch Off
VD = 0.8*VDD / 0.2*VDD
VS = 0.2*VDD / 0.8*VDD
TA = –40°C to +85°C		 –10 0.01 10 nA
IS(OFF)
ID(OFF) 		OFF leakage current Switch Off
VD = 0.8*VDD / 0.2*VDD
VS = 0.2*VDD / 0.8*VDD
TA = –40°C to +125°C		 –100 0.01 100 nA
ID(ON)
IS(ON) 		ON leakage current Switch On
VD = 0.8 x VDD / 0.2 x VDD, S pins floating
or
VS = 0.8 x VDD / 0.2 x VDD, D pins floating
TA = –40°C to +85°C		 –10 0.01 10 nA
ID(ON)
IS(ON) 		ON leakage current Switch On
VD = 0.8*VDD / 0.2*VDD, S pins floating
or
VS = 0.8*VDD / 0.2*VDD, D pins floating
TA = –40°C to +125°C		 –160 0.01 160 nA
LOGIC INPUTS
VIH Input logic high 0.8 3.6 V
VIL Input logic low 0 0.45 V
IIH Input high leakage current VSEL = 1.8V, VDD 0.5 2.5 μA
IIL Input low leakage current VSEL = 0V –1 0.1 μA
RPD Internal pull-down resistor on logic pins 6 MΩ
CI Logic input capacitance VSEL = 0V, 1.8V or VDD
f = 1 MHz		 3 pF