SCES295AB
June 2000 – October 2025
SN74LVC1G06
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Switching Characteristics: –40°C to +85°C
5.7
Switching Characteristics: –40°C to +125°C
5.8
Operating Characteristics
5.9
Typical Characteristics
Parameter Measurement Information
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
CMOS Open-Drain Outputs
6.3.2
Standard CMOS Inputs
6.3.3
Negative Clamping Diodes
6.3.4
Partial Power Down (Ioff)
6.3.5
Over-voltage Tolerant Inputs
6.4
Device Functional Modes
7
Application and Implementation
7.1
Application Information
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.3
Application Curve
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Receiving Notification of Documentation Updates
8.2
Support Resources
8.3
Trademarks
8.4
Electrostatic Discharge Caution
8.5
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
1
Features
ESD protection exceeds JESD 22
2000V human body model (A114-A)
200V machine model (A115-A)
1000V charged-device model (C101)
Available in the Texas Instruments
NanoFree™
package
Supports 5V V
CC
operation
Input and open-drain output accept voltages up to 5.5V
Maximum t
pd
of 4.5ns at 3.3V at 125°C
Low power consumption, 10µA maximum I
CC
±24mA output drive at 3.3V for open-drain devices
I
off
supports partial-power-down mode and back-drive protection
Latch-up performance exceeds 100mA per JESD 78, class II
Can be used for up or down translation
Schmitt trigger action on all ports