SCES351Y July   2001  – October 2025 SN74LVC1G17

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics—DC Limit Changes
    6. 5.6  Switching Characteristics, CL = 15pF
    7. 5.7  Switching Characteristics AC Limit, –40°C to 85°C
    8. 5.8  Switching Characteristics AC Limit, –40°C to 125°C
    9. 5.9  Operating Characteristics
    10. 5.10 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Revision History

Changes from Revision X (June 2025) to Revision Y (October 2025)

  • Changed Junction-to-ambient thermal resistance value for DCK package from: 280°C/W to: 371.0°C/W Go
  • Changed Junction-to-case (top) thermal resistance value for DCK package from: 66°C/W to: 297.5°C/WGo
  • Changed Junction-to-board thermal resistance value for DCK package from: 67°C/W to: 258.6°C/WGo
  • Changed Junction-to-top characterization value for DCK package from: 2°C/W to: 195.6°C/WGo
  • Changed Junction-to-board characterization value for DCK package from: 66°C/W to: 256.2°C/WGo

Changes from Revision W (September 2020) to Revision X (June 2025)

  • Updated the document to reflect TI writing standardsGo
  • Changed Device Information table to Package Information Go
  • Moved Tstg to Absolute Maximum Ratings tableGo
  • Changed Handling Ratings to ESD Ratings Go
  • Changed Junction-to-ambient thermal resistance value for DBV package from: 229°C/W to: 357.1°C/W Go
  • Changed Junction-to-case (top) thermal resistance value for DBV package from: 164°C/W to: 263.7°C/WGo
  • Changed Junction-to-board thermal resistance value for DBV package from: 62°C/W to: 264.4°C/WGo
  • Changed Junction-to-top characterization value for DBV package from: 44°C/W to: 195.6°C/WGo
  • Changed Junction-to-board characterization value for DBV package from: 62°C/W to: 262.2°C/WGo
  • Removed rise time and fall time information from the recommended input conditions in the Detailed Design Procedure Go