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Noninverting buffers & drivers

SN74LVC1G17

ACTIVE

Single 1.65-V to 5.5-V buffer with Schmitt-Trigger inputs

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Data sheet

SN74LVC1G17

ACTIVE
Data sheet Order now

Product details

Technology family LVC Number of channels 1 IOL (max) (mA) 24 Supply current (max) (µA) 10 IOH (max) (mA) -24 Input type Schmitt-Trigger Output type Push-Pull Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LVC Number of channels 1 IOL (max) (mA) 24 Supply current (max) (µA) 10 IOH (max) (mA) -24 Input type Schmitt-Trigger Output type Push-Pull Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
SOT-SC70 (DCK) 5 4.2 mm² (2 mm × 2.1 mm) SOT-5X3 (DRL) 5 2.56 mm² (1.6 mm × 1.6 mm) DSBGA (YZV) 4 1.5625 mm² (— mm × — mm) X2SON (DSF) 6 1 mm² (1 mm × 1 mm) USON (DRY) 6 1.45 mm² (1.45 mm × 1 mm) X2SON (DPW) 5 0.64 mm² (0.8 mm × 0.8 mm) DSBGA (YZP) 5 2.1875 mm² (— mm × — mm) SOT-23 (DBV) 5 8.12 mm² (2.9 mm × 2.8 mm)
  • Available in ultra small 0.64mm2 package (DPW) with 0.5mm pitch
  • Supports 5V VCC operation
  • Inputs accept voltages to 5.5V
  • Maximum tpd of 4.6ns at 3.3V
  • Low power consumption, 10µA maximum ICC
  • ±24mA output drive at 3.3V
  • Ioff supports live insertion, partial-power-down mode, and back-drive protection
  • Latch-up performance exceeds 100mA per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 2000V human-body model (A114A)
    • 200V machine model (A115A)
    • 1000V charged-device model (C101)
  • Available in ultra small 0.64mm2 package (DPW) with 0.5mm pitch
  • Supports 5V VCC operation
  • Inputs accept voltages to 5.5V
  • Maximum tpd of 4.6ns at 3.3V
  • Low power consumption, 10µA maximum ICC
  • ±24mA output drive at 3.3V
  • Ioff supports live insertion, partial-power-down mode, and back-drive protection
  • Latch-up performance exceeds 100mA per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 2000V human-body model (A114A)
    • 200V machine model (A115A)
    • 1000V charged-device model (C101)

This single Schmitt-trigger buffer is designed for 1.65V to 5.5V VCC operation.

The SN74LVC1G17 device contains one buffer and performs the Boolean function Y = A.

The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range.

The SN74LVC1G17 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8mm × 0.8mm.

This single Schmitt-trigger buffer is designed for 1.65V to 5.5V VCC operation.

The SN74LVC1G17 device contains one buffer and performs the Boolean function Y = A.

The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range.

The SN74LVC1G17 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8mm × 0.8mm.
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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet SN74LVC1G17 Single Schmitt-Trigger Buffer datasheet (Rev. Y) PDF | HTML Oct 28, 2025
Application note Designing EMC-Compliant, High-Accuracy PLC Analog Input Modules (0-10V / 4-20mA) with ADS125H18 PDF | HTML Jul 6, 2026
Application brief Understanding Schmitt Triggers (Rev. B) PDF | HTML Apr 17, 2025
Product overview Generate a Power-On Reset Pulse PDF | HTML Jun 14, 2023
Application brief Generate a Clock Signal from a Crystal Oscillator PDF | HTML Oct 8, 2020
Application brief Debounce a Switch PDF | HTML Oct 8, 2020
Application note Designing and Manufacturing with TI's X2SON Packages Aug 23, 2017
Application note Use of the CMOS Unbuffered Inverter in Oscillator Circuits Nov 6, 2003

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

5-8-LOGIC-EVM — Generic logic evaluation module for 5-pin to 8-pin DCK, DCT, DCU, DRL and DBV packages

Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
User guide: PDF
Supported products & hardware
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Evaluation board

5-8-NL-LOGIC-EVM — Generic logic and translation EVM supporting 5 to 8 pin DPW, DQE, DRY, DSF, DTM, DTQ and DTT pkgs

Generic EVM designed to support any logic or translation device that has a DTT, DRY, DPW, DTM, DQE, DQM, DSF, or DTQ package. Board design allows for flexible evaluation.

User guide: PDF | HTML
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Simulation model

HSPICE Model for SN74LVC1G17

SCEJ260.ZIP (88 KB) - HSpice model
Supported products & hardware
Simulation model

SN74LVC1G17 Behavioral SPICE Model

SCEM635.ZIP (7 KB) - PSpice model
Supported products & hardware
Simulation model

SN74LVC1G17 IBIS Model (Rev. C)

SCEM299C.ZIP (45 KB) - IBIS model
Supported products & hardware

Many TI reference designs include the SN74LVC1G17

Use our reference design selection tool to review and identify designs that best match your application and parameters.
Package Pins CAD symbols, footprints & 3D models
SOT-SC70 (DCK) 5 Ultra Librarian
SOT-5X3 (DRL) 5 Ultra Librarian
DSBGA (YZV) 4 Ultra Librarian
X2SON (DSF) 6 Ultra Librarian
USON (DRY) 6 Ultra Librarian
X2SON (DPW) 5 Ultra Librarian
DSBGA (YZP) 5 Ultra Librarian
SOT-23 (DBV) 5 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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