SCES640L January   2007  – January 2026 TXS0102

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics, VCCA = 1.8 ± 0.15V
    7. 5.7  Switching Characteristics, VCCA = 2.5 ± 0.2V
    8. 5.8  Switching Characteristics, VCCA = 3.3 ± 0.3V
    9. 5.9  Switching Characteristics: Tsk, TMAX
    10. 5.10 Operating Characteristics: VCCA = 1.5V to 3.3V, VCCB = 1.5V to 3.3V
    11. 5.11 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Architecture
      2. 7.3.2 Input Driver Requirements
      3. 7.3.3 Output Load Considerations
      4. 7.3.4 Enable and Disable
      5. 7.3.5 Pullup or Pulldown Resistors on I/O Lines
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

5.10 Operating Characteristics: VCCA = 1.5V to 3.3V, VCCB = 1.5V to 3.3V

 TA = 25℃ (1)
PARAMETER TEST CONDITIONS Supply Voltage (VCCA = VCCB  ,unless otherwise noted) UNIT
1.8 ± 0.15V 2.5 ± 0.2V 3.3 ± 0.3V
TYP TYP TYP
CpdA (2) A-port input, B-port output to B: outputs enabled A Port
CL = 0, RL = Open
f = 10MHz
trise = tfall = 1ns		 4.1 4.2 4.7 pF
B-port input, A-port output to B: outputs enabled 9.0 7.3 7.8
CpdB (3) A-port input, B-port output to B: outputs enabled 11.0 9.9 9.2
B-port input, A-port output to B: outputs enabled 5.6 7.1 7.4
CpdA (2) A-port input, B-port output to B: outputs disabled B Port
CL = 0, RL = Open
f = 10MHz
trise = tfall = 1ns		 0.1 0.1 0.1 pF
B-port input, A-port output to B: outputs disabled 0.1 0.1 0.1
CpdB (3) A-port input, B-port output to B: outputs disabled 0.2 0.2 0.2
B-port input, A-port output to B: outputs disabled 0.2 0.2 0.18
(1) For additional information about how power dissipation capacitance affects power consumption, see the CMOS Power Consumption and Cpd Calculation application note.
(2) A-Port power dissipation capacitance per transceiver
(3) B-Port power dissipation capacitance per transceiver