Product details

Technology Family TXS Applications I2C, MDIO Bits (#) 2 High input voltage (Min) (Vih) 1.45 High input voltage (Max) (Vih) 5.5 Vout (Min) (V) 1.65 Vout (Max) (V) 5.5 IOH (Max) (mA) 0 IOL (Max) (mA) 0 Rating Catalog
Technology Family TXS Applications I2C, MDIO Bits (#) 2 High input voltage (Min) (Vih) 1.45 High input voltage (Max) (Vih) 5.5 Vout (Min) (V) 1.65 Vout (Max) (V) 5.5 IOH (Max) (mA) 0 IOL (Max) (mA) 0 Rating Catalog
DSBGA (YZP) 8 3 mm² .928 x 1.928 SSOP (DCT) 8 8 mm² 3 x 2.8 SSOP (DCT) 8 8 mm² 2.95 x 2.80 VSSOP (DCU) 8 6 mm² 2 x 3.1 X2SON (DQE) 8 1 mm² 1.4 x 1 X2SON (DQM) 8 2 mm² 1.8 x 1.2
  • No Direction-Control Signal Needed
  • Maximum Data Rates
    • 24 Mbps (Push Pull)
    • 2 Mbps (Open Drain)
  • Available in the Texas Instruments NanoStar™ Package
  • 1.65 V to 3.6 V on A Port and 2.3 V to 5.5 V on B Port (VCCA  ≤ VCCB)
  • VCC Isolation Feature: If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State
  • No Power-Supply Sequencing Required: Either VCCA or VCCB Can Be Ramped First
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • A Port:
      • 2500-V Human-Body Model (A114-B)
      • 250-V Machine Model (A115-A)
      • 1500-V Charged-Device Model (C101)
    • B Port:
      • 8-kV Human-Body Model (A114-B)
      • 250-V Machine Model (A115-A)
      • 1500-V Charged-Device Model (C101)
  • No Direction-Control Signal Needed
  • Maximum Data Rates
    • 24 Mbps (Push Pull)
    • 2 Mbps (Open Drain)
  • Available in the Texas Instruments NanoStar™ Package
  • 1.65 V to 3.6 V on A Port and 2.3 V to 5.5 V on B Port (VCCA  ≤ VCCB)
  • VCC Isolation Feature: If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State
  • No Power-Supply Sequencing Required: Either VCCA or VCCB Can Be Ramped First
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • A Port:
      • 2500-V Human-Body Model (A114-B)
      • 250-V Machine Model (A115-A)
      • 1500-V Charged-Device Model (C101)
    • B Port:
      • 8-kV Human-Body Model (A114-B)
      • 250-V Machine Model (A115-A)
      • 1500-V Charged-Device Model (C101)

This two-bit non-inverting translator is a bidirectional voltage-level translator and can be used to establish digital switching compatibility between mixed-voltage systems. It uses two separate configurable power-supply rails, with the A ports supporting operating voltages from 1.65 V to 3.6 V while it tracks the VCCA supply, and the B ports supporting operating voltages from 2.3 V to 5.5 V while it tracks the VCCB supply. This allows the support of both lower and higher logic signal levels while providing bidirectional translation capabilities between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

When the output-enable (OE) input is low, all I/Os are placed in the high-impedance state, which significantly reduces the power-supply quiescent current consumption.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

This two-bit non-inverting translator is a bidirectional voltage-level translator and can be used to establish digital switching compatibility between mixed-voltage systems. It uses two separate configurable power-supply rails, with the A ports supporting operating voltages from 1.65 V to 3.6 V while it tracks the VCCA supply, and the B ports supporting operating voltages from 2.3 V to 5.5 V while it tracks the VCCB supply. This allows the support of both lower and higher logic signal levels while providing bidirectional translation capabilities between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

When the output-enable (OE) input is low, all I/Os are placed in the high-impedance state, which significantly reduces the power-supply quiescent current consumption.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

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Technical documentation

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Type Title Date
* Data sheet TXS0102 2-Bit Bidirectional Voltage-Level Translator datasheet (Rev. I) 27 Aug 2018
Application note Translate Voltages for MDIO 16 Jul 2021
User guide TXS-EVM User's Guide (Rev. B) 08 Jun 2021
Selection guide Voltage Translation Buying Guide (Rev. A) 15 Apr 2021
Technical article How smart thermostats get their degrees 09 Mar 2020
Application note Effects of pullup and pulldown resistors on TXS and TXB devices (Rev. A) 28 Mar 2018
Application note Factors Affecting VOL for TXS and LSF Auto-bidirectional Translation Devices 19 Nov 2017
Application note Biasing Requirements for TXS, TXB, and LSF Auto-Bidirectional Translators 30 Oct 2017
Application note A Guide to Voltage Translation With TXS-Type Translators 29 Jun 2010

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Evaluation board

5-8-LOGIC-EVM — Generic logic EVM supporting 5 through 8 pin DCK, DCT, DCU, DRL, and DBV packages

Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
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Evaluation board

TXS-EVM — 1 to 8 bit TXS translator family evaluation module

The TXS-EVM is designed to support single, dual, quad and octal channel TXS devices. The TXS devices belong to the auto bidirectional voltage level translation family with an operating voltage between 1.2V and 5.5 V designed to support various generic voltage level translation applications across (...)

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