SCES874A March   2017  – August 2026 SN74LVC1G79-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Timing Requirements: TA = –40°C to +85°C
    7. 5.7  Timing Requirements: TA = –40°C to +125°C
    8. 5.8  Switching Characteristics: CL = 15pF, TA = –40°C to +85°C
    9. 5.9  Switching Characteristics: CL = 30 or 50pF, TA = –40°C to +85°C
    10. 5.10 Switching Characteristics: CL = 30pF or 50pF, TA = –40°C to +125°C
    11. 5.11 Operating Characteristics
    12. 5.12 Typical Characteristics
  7.   Parameter Measurement Information
  8. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Balanced High-Drive CMOS Push-Pull Outputs
      2. 6.3.2 Standard CMOS Inputs
      3. 6.3.3 Clamp Diodes
      4. 6.3.4 Partial Power Down (Ioff)
      5. 6.3.5 Over-Voltage Tolerant Inputs
    4. 6.4 Device Functional Modes
  9. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  10. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  11. 9 Revision History
  12. 10Mechanical, Packaging, and Orderable Information

9 Revision History

Changes from March 1, 2017 to August 14, 2026 (from Revision * (March 2017) to Revision A (August 2026))

  • Updated the numbering format for tables, figures, and cross-references throughout the documentGo
  • Changed Junction-to-ambient thermal resistance value for DCK package from: 277.6°C/W to: 371°C/WGo
  • Changed Junction-to-case (top) thermal resistance value for DCK package from: 179.5°C/W to: 297.5°C/WGo
  • Changed Junction-to-board characterization value for DCK package from: 75.9°C/W to: 258.6°C/WGo
  • Changed Junction-to-top characterization value for DCK package from: 49.7°C/W to: 195.6°C/WGo
  • Changed Junction-to-board characterization value for DCK package from: 75.1°C/W to: 256.2°C/WGo