SCHS149G November   1998  – January 2025 CD54HC147 , CD74HC147 , CD74HCT147

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Description
  4. 3 Pin Configuration and Functions
  5. 4 Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 Recommended Operating Conditions
    3. 4.3 Thermal Information
    4. 4.4 Electrical Characteristics
    5. 4.5 Switching Characteristics
  6. 5 Parameter Measurement Information
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
      2. 7.2.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

1 Features

  • Buffered inputs and outputs
  • Typical propagation delay: 13ns at VCC = 5V, CL = 15pF, TA = 25oC
  • Fanout (over temperature range)
    • Bus driver outputs: 15 LSTTL loads
  • Wide operating temperature range: -55oC to 125oC
  • Balanced propagation delay and transition times
  • Significant power reduction compared to LSTTL logic ICs
  • HC types
    • 2V to 6V Operation
    • High noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT types
    • 4.5V to 5.5V Operation
    • Direct LSTTL input logic compatibility, VIL= 0.8V (Max), VIH = 2V (Min)
    • CMOS input compatibility, Il ≤ 1µA at VOL, VOH