The HC147 and CD74HCT147 are high speed silicon-gate CMOS devices and are pin-compatible with low power Schottky TTL (LSTTL).
The HC147 and CD74HCT147 9-input priority encoders accept data from nine active LOW inputs (l1 to l9) and provide binary representation on the four active LOW inputs (Y0\ to Y3\). A priority is assigned to each input so that when two or more inputs are simultaneously active, the input with the highest priority is represented on the output, with input line l9 having the highest priority.
These devices provide the 10-line to 4-line priority encoding function by use of the implied decimal "zero". The "zero" is encoded when all nine data inputs are HIGH, forcing all four outputs HIGH.
Data sheet acquired from Harris Semiconductor
|Part number||Order||Function||Technology Family||VCC (Min) (V)||VCC (Max) (V)||Channels (#)||Voltage (Nom) (V)||F @ nom voltage (Max) (MHz)||ICC @ nom voltage (Max) (mA)||tpd @ nom Voltage (Max) (ns)||Configuration||Type||IOL (Max) (mA)||IOH (Max) (mA)||Rating||Operating temperature range (C)||Package Group||Package size: mm2:W x L (PKG)||Bits (#)||Digital input leakage (Max) (uA)||ESD CDM (kV)||ESD HBM (kV)|
|HCT||4.5||5.5||1||5||25||0.08||35||10:4||Standard||4||-4||Catalog||-55 to 125||PDIP | 16||16PDIP: 181 mm2: 9.4 x 19.3 (PDIP | 16)||10||5||0.75||2|