SCLS405G April   1998  – January 2025 SN74LV163A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Description
  4. 3 Pin Configuration and Functions
  5. 4 Specifications
    1. 4.1  Absolute Maximum Ratings
    2. 4.2  ESD Ratings
    3. 4.3  Recommended Operating Conditions
    4. 4.4  Thermal Information
    5. 4.5  Electrical Characteristics
    6. 4.6  Timing Requirements, VCC = 2.5V ± 0.2V
    7. 4.7  Timing Requirements, VCC = 3.3V ± 0.3V
    8. 4.8  Timing Requirements, VCC = 5V ± 0.5V
    9. 4.9  Switching Characteristics, VCC = 2.5V ± 0.2V
    10. 4.10 Switching Characteristics, VCC = 3.3V ± 0.3V
    11. 4.11 Switching Characteristics, VCC = 5V ± 0.5V
    12. 4.12 Noise Characteristics
    13. 4.13 Operating Characteristics
    14. 4.14 Typical Clear, Preset, Count, and Inhibit Sequence
  6. 5 Parameter Measurement Information
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
      2. 7.2.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

4.6 Timing Requirements, VCC = 2.5V ± 0.2V

over recommended operating free-air temperature range, VCC = 2.5V ± 0.2V (unless otherwise noted) (see Load Circuit and Voltage Waveforms)
TA = 25°C SN74LV163A UNIT
MIN MAX MIN MAX
tw Pulse duration, CLK high or low 7 7 ns
tsu Setup time before CLK↑ CLR 6 6 ns
Data (A, B, C, and D) 7.5 8.5
ENP, ENT 9.5 11
LOAD low 10 11.5
th Hold time, all synchronous inputs after CLK↑ 1.5 1.5 ns