SCPS292 July   2025 TCA9539A-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 I2C Interface Timing Requirements
    7. 5.7 RESET Timing Requirements
    8. 5.8 Switching Characteristics
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 I/O Port
      2. 7.3.2 RESET Input
      3. 7.3.3 Interrupt ( INT) Output
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-On Reset
    5. 7.5 Programming
      1. 7.5.1 I2C Interface
    6. 7.6 Register Map
      1. 7.6.1 Device Address
      2. 7.6.2 Control Register And Command Byte
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Calculating Junction Temperature and Power Dissipation
        2. 8.2.2.2 Minimizing ICC When I/Os Control LEDs
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.6.2 Control Register And Command Byte

Following the successful acknowledgment of the address byte, the bus controller sends a command byte (shown in Table 7-4) that is stored in the control register in the TCA9539-Q1. Three bits of this data byte state the operation (read or write) and the internal register (input, output, Polarity Inversion or Configuration) that is affected. This register can be written or read through the I2C bus. The command byte is sent only during a write transmission.

Table 7-4 Command Byte
CONTROL REGISTER BITS COMMAND BYTE (HEX) REGISTER PROTOCOL POWER-UP DEFAULT
B2 B1 B0
0 0 0 0x00 Input Port 0 Read byte XXXX XXXX
0 0 1 0x01 Input Port 1 Read byte XXXX XXXX
0 1 0 0x02 Output Port 0 Read-write byte 1111 1111
0 1 1 0x03 Output Port 1 Read-write byte 1111 1111
1 0 0 0x04 Polarity Inversion Port 0 Read-write byte 0000 0000
1 0 1 0x05 Polarity Inversion Port 1 Read-write byte 0000 0000
1 1 0 0x06 Configuration Port 0 Read-write byte 1111 1111
1 1 1 0x07 Configuration Port 1 Read-write byte 1111 1111

When a command byte has been sent, the register pair that was addressed continues to be accessed by reads until a new command byte has been sent. Figure 7-7 shows the control register bits.

TCA9539A-Q1 Control Register Bits Figure 7-7 Control Register Bits