The typical layout of VTM on TI SOC is shown in Figure 1-2. This shows that the temperature monitor, for example, the on-chip temperature sensor, is placed near the heat-generating areas. The VTM module controls the temperature monitors within the chip via internal connections. A single VTM can control up to eight temperature sensors through the registers. Since the temperature sensors do not update periodically on their own, the VTM periodically enables the temperature sensors to continuously update the reported temperature data. The temperature values returned by the temperature sensors are captured by the VTM registers and stored in corresponding registers within the VTM. When the sensors are not enabled, the VTM keeps them in a reset state to save power and reduce sensor usage, which maximizes the sensor lifespan.

Different SOC normally requires different number of temperature sensors, and the principle is to try to put the sensor close to the heat sources, and also cover all the heating sources. Table 1-1 collects the temperature sensors associating with their position in all of TI processors. Customers can loop up the result according to the corresponding SOC being applied. The table is classified based on the physical proximity of hotspots. Since sensors are mostly located between two heat sources and different power domain boundaries, it is difficult to define clearly. The table can only serve as a rough reference for sensor locations. For detailed information, please refer to the TRM (Technical Reference Manual).

All the SOCs place a sensor around the Arm cores, because the core is the hottest point in the SOC. Since DDR is responsible for the data throughput of the entire SOC and operates at high speeds, DDR carries a significant risk of overheating. Therefore, it is also generally required to place sensors in the DDR controller for monitoring.