Product details

Arm CPU 2 Arm Cortex-A72 Arm MHz (Max.) 2000 Co-processor(s) MCU Island of 2 Arm Cortex-R5F (lockstep opt), SoC main of 4 Arm Cortex-R5F (lockstep opt) CPU 64-bit Graphics acceleration 1 3D Display type 2 DPI, 1 DSI, 1 EDP Protocols Ethernet Ethernet MAC 8-Port 2.5Gb switch PCIe 4 PCIe Gen 3 switch Hardware accelerators 1 Deep Learning accelerator, 1 Depth and Motion accelerator, 1 Video Encode/Decode accelerator, 1 Vision Processing accelerator Features Vision Analytics Operating system Linux, QNX, RTOS Security Cryptography, Debug security, Device identity, Isolation firewalls, Secure boot, Secure storage & programming, Software IP protection, Trusted execution environment Rating Automotive Operating temperature range (C) -40 to 105
Arm CPU 2 Arm Cortex-A72 Arm MHz (Max.) 2000 Co-processor(s) MCU Island of 2 Arm Cortex-R5F (lockstep opt), SoC main of 4 Arm Cortex-R5F (lockstep opt) CPU 64-bit Graphics acceleration 1 3D Display type 2 DPI, 1 DSI, 1 EDP Protocols Ethernet Ethernet MAC 8-Port 2.5Gb switch PCIe 4 PCIe Gen 3 switch Hardware accelerators 1 Deep Learning accelerator, 1 Depth and Motion accelerator, 1 Video Encode/Decode accelerator, 1 Vision Processing accelerator Features Vision Analytics Operating system Linux, QNX, RTOS Security Cryptography, Debug security, Device identity, Isolation firewalls, Secure boot, Secure storage & programming, Software IP protection, Trusted execution environment Rating Automotive Operating temperature range (C) -40 to 105
FCBGA (ALF) 827

Processor cores:

  • C7x floating point, vector DSP, up to 1.0 GHz, 80 GFLOPS, 256 GOPS
  • Deep-learning matrix multiply accelerator (MMA), up to 8 TOPS (8b) at 1.0 GHz
  • Vision Processing Accelerators (VPAC) with Image Signal Processor (ISP) and multiple vision assist accelerators
  • Depth and Motion Processing Accelerators (DMPAC)
  • Dual 64-bit Arm Cortex-A72 microprocessor subsystem at up to 2.0 GHz
    • 1MB shared L2 cache per dual-core Cortex-A72 cluster
    • 32KB L1 DCache and 48KB L1 ICache per Cortex-A72 core
  • Six Arm Cortex-R5F MCUs at up to 1.0 GHz
    • 16K I-Cache, 16K D-Cache, 64K L2 TCM
    • Two Arm Cortex-R5F MCUs in isolated MCU subsystem
    • Four Arm Cortex-R5F MCUs in general compute partition
  • Two C66x floating point DSP, up to 1.35 GHz, 40 GFLOPS, 160 GOPS
  • 3D GPU PowerVR Rogue 8XE GE8430, up to 750 MHz, 96 GFLOPS, 6 Gpix/sec
  • Custom-designed interconnect fabric supporting near max processing entitlement

    Memory subsystem:

  • Up to 8MB of on-chip L3 RAM with ECC and coherency
    • ECC error protection
    • Shared coherent cache
    • Supports internal DMA engine
  • External Memory Interface (EMIF) module with ECC
    • Supports LPDDR4 memory types
    • Supports speeds up to 3733 MT/s
    • 32-bit data bus with inline ECC up to 14.9GB/s
  • General-Purpose Memory Controller (GPMC)
  • 512KB on-chip SRAM in MAIN domain, protected by ECC

    Functional Safety:

  • Functional Safety-Compliant targeted (on select part numbers)
    • Developed for functional safety applications
    • Documentation available to aid ISO 26262 functional safety system design up to ASIL-D/SIL-3 targeted
    • Systematic capability up to ASIL-D/SIL-3 targeted
    • Hardware integrity up to ASIL-D/SIL-3 targeted for MCU Domain
    • Hardware integrity up to ASIL-B/SIL-2 targeted for Main Domain
    • Safety-related certification
      • ISO 26262 planned
  • AEC-Q100 qualilfied on part number variants ending in Q1
  • Device security (on select part numbers):

  • Secure boot with secure runtime support
  • Customer programmable root key, up to RSA-4K or ECC-512
  • Embedded hardware security module
  • Crypto hardware accelerators – PKA with ECC, AES, SHA, RNG, DES and 3DES

    High speed serial interfaces:

  • Integrated ethernet switch supporting (total of 8 external ports)
    • Up to eight 2.5Gb SGMII
    • Up to eight RMII (10/100) or RGMII (10/100/1000)
    • Up to two QSGMII
  • Up to four PCI-Express (PCIe) Gen3 controllers
    • Up to two lanes per controller
    • Gen1 (2.5GT/s), Gen2 (5.0GT/s), and Gen3 (8.0GT/s) operation with auto-negotiation
  • Two USB 3.0 dual-role device (DRD) subsystem
    • Two enhanced SuperSpeed Gen1 Ports
    • Each port supports Type-C switching
    • Each port independently configurable as USB host, USB peripheral, or USB DRD

    Automotive interfaces:

  • Sixteen Modular Controller Area Network (MCAN) modules with full CAN-FD support
  • Two CSI2.0 4L RX plus One CSI2.0 4L TX
    • 2.5Gbps RX throughput per lane (20Gbps total)

    Display subsystem:

  • One eDP/DP interface with Multi-Display Support (MST)
    • HDCP1.4/HDCP2.2 high-bandwidth digital content protection
  • One DSI TX (up to 2.5K)
  • Up to two DPI

    Audio interfaces:

  • Twelve Multichannel Audio Serial Port (MCASP) modules

    Video acceleration:

  • Ultra-HD video, one (3840 × 2160p, 60 fps), or two (3840 × 2160p, 30 fps) H.264/H.265 decode
  • Full-HD video, four (1920 × 1080p, 60 fps), or eight (1920 × 1080p, 30 fps) H.264/H.265 decode
  • Full-HD video, one (1920 × 1080p, 60 fps), or up to three (1920 × 1080p, 30 fps) H.264 encode

    Flash memory interfaces:

  • Embedded MultiMediaCard Interface ( eMMC™ 5.1)
  • Universal Flash Storage (UFS 2.1) interface with two lanes
  • Two Secure Digital 3.0/Secure Digital Input Output 3.0 interfaces (SD3.0/SDIO3.0)
  • Two simultaneous flash interfaces configured as
    • One OSPI and one QSPI flash interfaces
    • or one HyperBus™ and one QSPI flash interface

    System-on-Chip (SoC) architecture:

  • 16-nm FinFET technology
  • 24 mm × 24 mm, 0.8-mm pitch, 827-pin FCBGA (ALF), enables IPC class 3 PCB routing

    TPS6594-Q1 Companion Power Management ICs (PMIC):

  • Functional Safety support up to ASIL-D
  • Flexible mapping to support different use cases

Processor cores:

  • C7x floating point, vector DSP, up to 1.0 GHz, 80 GFLOPS, 256 GOPS
  • Deep-learning matrix multiply accelerator (MMA), up to 8 TOPS (8b) at 1.0 GHz
  • Vision Processing Accelerators (VPAC) with Image Signal Processor (ISP) and multiple vision assist accelerators
  • Depth and Motion Processing Accelerators (DMPAC)
  • Dual 64-bit Arm Cortex-A72 microprocessor subsystem at up to 2.0 GHz
    • 1MB shared L2 cache per dual-core Cortex-A72 cluster
    • 32KB L1 DCache and 48KB L1 ICache per Cortex-A72 core
  • Six Arm Cortex-R5F MCUs at up to 1.0 GHz
    • 16K I-Cache, 16K D-Cache, 64K L2 TCM
    • Two Arm Cortex-R5F MCUs in isolated MCU subsystem
    • Four Arm Cortex-R5F MCUs in general compute partition
  • Two C66x floating point DSP, up to 1.35 GHz, 40 GFLOPS, 160 GOPS
  • 3D GPU PowerVR Rogue 8XE GE8430, up to 750 MHz, 96 GFLOPS, 6 Gpix/sec
  • Custom-designed interconnect fabric supporting near max processing entitlement

    Memory subsystem:

  • Up to 8MB of on-chip L3 RAM with ECC and coherency
    • ECC error protection
    • Shared coherent cache
    • Supports internal DMA engine
  • External Memory Interface (EMIF) module with ECC
    • Supports LPDDR4 memory types
    • Supports speeds up to 3733 MT/s
    • 32-bit data bus with inline ECC up to 14.9GB/s
  • General-Purpose Memory Controller (GPMC)
  • 512KB on-chip SRAM in MAIN domain, protected by ECC

    Functional Safety:

  • Functional Safety-Compliant targeted (on select part numbers)
    • Developed for functional safety applications
    • Documentation available to aid ISO 26262 functional safety system design up to ASIL-D/SIL-3 targeted
    • Systematic capability up to ASIL-D/SIL-3 targeted
    • Hardware integrity up to ASIL-D/SIL-3 targeted for MCU Domain
    • Hardware integrity up to ASIL-B/SIL-2 targeted for Main Domain
    • Safety-related certification
      • ISO 26262 planned
  • AEC-Q100 qualilfied on part number variants ending in Q1
  • Device security (on select part numbers):

  • Secure boot with secure runtime support
  • Customer programmable root key, up to RSA-4K or ECC-512
  • Embedded hardware security module
  • Crypto hardware accelerators – PKA with ECC, AES, SHA, RNG, DES and 3DES

    High speed serial interfaces:

  • Integrated ethernet switch supporting (total of 8 external ports)
    • Up to eight 2.5Gb SGMII
    • Up to eight RMII (10/100) or RGMII (10/100/1000)
    • Up to two QSGMII
  • Up to four PCI-Express (PCIe) Gen3 controllers
    • Up to two lanes per controller
    • Gen1 (2.5GT/s), Gen2 (5.0GT/s), and Gen3 (8.0GT/s) operation with auto-negotiation
  • Two USB 3.0 dual-role device (DRD) subsystem
    • Two enhanced SuperSpeed Gen1 Ports
    • Each port supports Type-C switching
    • Each port independently configurable as USB host, USB peripheral, or USB DRD

    Automotive interfaces:

  • Sixteen Modular Controller Area Network (MCAN) modules with full CAN-FD support
  • Two CSI2.0 4L RX plus One CSI2.0 4L TX
    • 2.5Gbps RX throughput per lane (20Gbps total)

    Display subsystem:

  • One eDP/DP interface with Multi-Display Support (MST)
    • HDCP1.4/HDCP2.2 high-bandwidth digital content protection
  • One DSI TX (up to 2.5K)
  • Up to two DPI

    Audio interfaces:

  • Twelve Multichannel Audio Serial Port (MCASP) modules

    Video acceleration:

  • Ultra-HD video, one (3840 × 2160p, 60 fps), or two (3840 × 2160p, 30 fps) H.264/H.265 decode
  • Full-HD video, four (1920 × 1080p, 60 fps), or eight (1920 × 1080p, 30 fps) H.264/H.265 decode
  • Full-HD video, one (1920 × 1080p, 60 fps), or up to three (1920 × 1080p, 30 fps) H.264 encode

    Flash memory interfaces:

  • Embedded MultiMediaCard Interface ( eMMC™ 5.1)
  • Universal Flash Storage (UFS 2.1) interface with two lanes
  • Two Secure Digital 3.0/Secure Digital Input Output 3.0 interfaces (SD3.0/SDIO3.0)
  • Two simultaneous flash interfaces configured as
    • One OSPI and one QSPI flash interfaces
    • or one HyperBus™ and one QSPI flash interface

    System-on-Chip (SoC) architecture:

  • 16-nm FinFET technology
  • 24 mm × 24 mm, 0.8-mm pitch, 827-pin FCBGA (ALF), enables IPC class 3 PCB routing

    TPS6594-Q1 Companion Power Management ICs (PMIC):

  • Functional Safety support up to ASIL-D
  • Flexible mapping to support different use cases

The TDA4VM processor family is based on the evolutionary Jacinto™ 7 architecture, targeted at ADAS and Autonomous Vehicle (AV) applications and built on extensive market knowledge accumulated over a decade of TI’s leadership in the ADAS processor market. The unique combination high-performance compute, deep-learning engine, dedicated accelerators for signal and image processing in an functional safety compliant targeted architecture make the TDA4VM devices a great fit for several industrial applications, such as: Robotics, Machine Vision, Radar, and so on. The TDA4VM provides high performance compute for both traditional and deep learning algorithms at industry leading power/performance ratios with a high level of system integration to enable scalability and lower costs for advanced automotive platforms supporting multiple sensor modalities in centralized ECUs or stand-alone sensors. Key cores include next generation DSP with scalar and vector cores, dedicated deep learning and traditional algorithm accelerators, latest Arm and GPU processors for general compute, an integrated next generation imaging subsystem (ISP), video codec, Ethernet hub and isolated MCU island. All protected by automotive grade safety and security hardware accelerators.

Key Performance Cores Overview

The “C7x” next generation DSP combines TI’s industry leading DSP and EVE cores into a single higher performance core and adds floating point vector calculation capabilities, enabling backward compatibility for legacy code while simplifying software programming. The new “MMA” deep learning accelerator enables performance up to 8 TOPS within the lowest power envelope in the industry when operating at the typical automotive worst case junction temperature of 125°C. The dedicated ADAS/AV hardware accelerators provide vision pre-processing plus distance and motion processing with no impact on system performance.

General Compute Cores and Integration Overview

Separate dual core cluster configuration of Arm Cortex-A72 facilitates multi-OS applications with minimal need for a software hypervisor. Up to six Arm Cortex-R5F subsystems enable low-level, timing critical processing tasks to leave the Arm Cortex-A72’s unencumbered for applications. The integrated “8XE GE8430” GPU offers up to 100 GFLOPS to enable dynamic 3D rendering for enhanced viewing applications. Building on the existing world-class ISP, TI’s 7th generation ISP includes flexibility to process a broader sensor suite, support for higher bit depth, and features targeting analytics applications. Integrated diagnostics and safety features support operations up to ASIL-D/SIL-3 levels while the integrated security features protect data against modern day attacks. To enable systems requiring heavy data bandwidth, a PCIe hub and Gigabit Ethernet switch are included along with CSI-2 ports to support throughput for many sensor inputs. To further the integration, the TDA4VM family also includes an MCU island eliminating the need for an external system microcontroller.

The TDA4VM processor family is based on the evolutionary Jacinto™ 7 architecture, targeted at ADAS and Autonomous Vehicle (AV) applications and built on extensive market knowledge accumulated over a decade of TI’s leadership in the ADAS processor market. The unique combination high-performance compute, deep-learning engine, dedicated accelerators for signal and image processing in an functional safety compliant targeted architecture make the TDA4VM devices a great fit for several industrial applications, such as: Robotics, Machine Vision, Radar, and so on. The TDA4VM provides high performance compute for both traditional and deep learning algorithms at industry leading power/performance ratios with a high level of system integration to enable scalability and lower costs for advanced automotive platforms supporting multiple sensor modalities in centralized ECUs or stand-alone sensors. Key cores include next generation DSP with scalar and vector cores, dedicated deep learning and traditional algorithm accelerators, latest Arm and GPU processors for general compute, an integrated next generation imaging subsystem (ISP), video codec, Ethernet hub and isolated MCU island. All protected by automotive grade safety and security hardware accelerators.

Key Performance Cores Overview

The “C7x” next generation DSP combines TI’s industry leading DSP and EVE cores into a single higher performance core and adds floating point vector calculation capabilities, enabling backward compatibility for legacy code while simplifying software programming. The new “MMA” deep learning accelerator enables performance up to 8 TOPS within the lowest power envelope in the industry when operating at the typical automotive worst case junction temperature of 125°C. The dedicated ADAS/AV hardware accelerators provide vision pre-processing plus distance and motion processing with no impact on system performance.

General Compute Cores and Integration Overview

Separate dual core cluster configuration of Arm Cortex-A72 facilitates multi-OS applications with minimal need for a software hypervisor. Up to six Arm Cortex-R5F subsystems enable low-level, timing critical processing tasks to leave the Arm Cortex-A72’s unencumbered for applications. The integrated “8XE GE8430” GPU offers up to 100 GFLOPS to enable dynamic 3D rendering for enhanced viewing applications. Building on the existing world-class ISP, TI’s 7th generation ISP includes flexibility to process a broader sensor suite, support for higher bit depth, and features targeting analytics applications. Integrated diagnostics and safety features support operations up to ASIL-D/SIL-3 levels while the integrated security features protect data against modern day attacks. To enable systems requiring heavy data bandwidth, a PCIe hub and Gigabit Ethernet switch are included along with CSI-2 ports to support throughput for many sensor inputs. To further the integration, the TDA4VM family also includes an MCU island eliminating the need for an external system microcontroller.

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Technical documentation

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Type Title Date
* Data sheet TDA4VM Jacinto™ Processors for ADAS and Autonomous Vehicles Silicon Revisions 1.0 and 1.1 datasheet (Rev. J) 31 Aug 2021
* Errata J721E DRA829/TDA4VM Processors Silicon Revision 1.1/1.0 (Rev. A) 03 Aug 2021
* User guide DRA829/TDA4VM/AM752x Technical Reference Manual (Rev. B) 18 Jan 2021
Application note Jacinto7 HS Device Development 13 Jan 2022
User guide C6000-to-C7000 Migration User's Guide (Rev. D) 10 Jan 2022
Application note Enabling MAC2MAC Feature on Jacinto7 Soc 10 Jan 2022
More literature Jacinto™ 7 automotive processors 14 Dec 2021
Application note Jacinto 7 Display Subsystem Overview 10 Dec 2021
Application note Jacinto 7 Thermal Management Guide - Software Strategies 10 Dec 2021
Application note Jacinto7 HS Device Flashing Solution 09 Dec 2021
User guide Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 & TDA4VM Automotive PDN (Rev. A) 02 Dec 2021
Application note Jacinto 7 LPDDR4 Board Design and Layout Guidelines (Rev. B) 17 Aug 2021
Application note Jacinto7 DDRSS Register Configuration Tool 16 Aug 2021
Functional safety information TÜV SÜD Certificate for Functional Safety Software Development Process (Rev. A) 21 Jul 2021
Application note TDA4 Flashing Techniques 08 Jul 2021
Application note Jacinto 7 Camera Capture and Imaging Subsystem 07 Jul 2021
Application note J721E DDR Firewall Example 01 Jul 2021
User guide Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto™ 7 DRA829 or TDA4VM Automo 24 Jun 2021
Application note Hardware Accelerated Structure From Motion on TDA4VM 23 Apr 2021
Application note Efficient Visual Localization on TDA4VM (Rev. A) 19 Apr 2021
More literature Build safer, efficient, intelligent and autonomous robots 04 Mar 2021
Application note TDA4VMid VPAC ISP Tuning Overview (Rev. A) 14 Jan 2021
White paper Jacinto™ 7 프로세서의 보안 구현 도구 04 Jan 2021
White paper Security Enablers on Jacinto™ 7 Processors 04 Jan 2021
White paper Sicherheitsaktivierung auf Jacinto™ 7-Prozessoren 04 Jan 2021
White paper Differenzierungsmöglichkeit durch MCU-Integration Prozessoren der Reihe Jacinto™ 22 Oct 2020
White paper Enabling Differentiation through MCU Integration on Jacinto™ 7 Processors 22 Oct 2020
White paper Jacinto™ 7 프로세서의 MCU 통합으로 차별화 지원 22 Oct 2020
Application note MMC SW Tuning Algorithm 18 Aug 2020
Application note OSPI Tuning Procedure 08 Jul 2020
White paper 360度環景系統與自動停車系統 01 Mar 2020
White paper 360도 인식이 가능한서라운드뷰와 자동 주차 시스템 01 Mar 2020
White paper 運用 Jacinto™ 7 處理器的汽車設計功能安全特性 01 Mar 2020
White paper 오토모티브 설계 시 Jacinto™ 7 프로세서의 기능적 안전성 활용하기 01 Mar 2020
Technical article Making ADAS technology more accessible in vehicles 07 Jan 2020
White paper A 360-degree view of surround-view and automated parking systems 10 Dec 2019
More literature Jacinto 7 EVM Quick Start Guide for TDA4VM and DRA829V Processors 10 Oct 2019
Application note Jacinto 7 High-Speed Interface Layout Guidelines 04 Oct 2019
User guide C6000-to-C7000 Migration User's Guide (Rev. C) 11 Aug 2019
User guide VCOP Kernel-C to C7000 Migration Tool User's Guide (Rev. C) 11 Aug 2019
Technical article Bringing the next evolution of machine learning to the edge 27 Nov 2018
Technical article How quality assurance on the Processor SDK can improve software scalability 22 Aug 2018
Technical article Clove: Low-Power video solutions based on Sitara™ AM57x processors 21 Jul 2016
Certificate TÜV NORD Certificate for Functional Safety Software Development Process 03 Feb 2015

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

J721EXCPXEVM — Common processor board for Jacinto™ 7 processors

The J721EXCP01EVM common processor board for Jacinto™ 7 processors lets you evaluate vision analytics and networking applications in automotive and industrial markets. The common processor board is compatible with all Jacinto 7 processors system-on-modules (sold separately or as a (...)

In stock
Limit: 5
Evaluation board

J721EXSOMXEVM — TDA4VM and DRA829V system-on-module

The J721EXSOMG01EVM system-on-module—when paired with the J721EXPCP01EVM common processor board—lets you evaluate TDA4VM and DRA829V processors in vision analytics and networking applications throughout automotive and industrial markets. These processors perform (...)

Evaluation board

J7EXPCXEVM — Gateway/Ethernet switch expansion card

Expand the capabilities of the J721EXCP01EVM common processor board for evaluating Jacinto 7 processors in vision analytics and networking applications in automotive and industrial markets with our Gateway/Ethernet switch expansion card.

In stock
Limit: 5
Evaluation board

J7EXPEXEVM — Audio and display expansion card

Expand the capabilities of the J721EXCP01EVM common processor board for evaluating Jacinto 7 processors in vision analytics and networking applications in automotive and industrial markets with our audio and display expansion card.
In stock
Limit: 5
Evaluation board

SK-TDA4VM — TDA4VM processor starter kit for Edge AI vision systems

Bring smart cameras, robots and intelligent machines to life with the TDA4VM processor starter kit. With a fast setup process and an assortment of foundational demos and tutorials, you can start prototyping a vision-based application in less than an hour. The kit enables 8 TOPS of deep learning (...)

Out of stock on TI.com
Debug probe

TMDSEMU560V2STM-U — XDS560v2 System Trace USB Debug Probe

The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).  Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors that (...)

In stock
Limit: 1
Development kit

D3-3P-TDAX-DK — D3 Engineering RVP-TDAx development kits

These rugged development kits are in a finalized product form-factor that lets you evaluate TI ADAS technology under realistic on-vehicle conditions. Accelerate development of autonomous vision-based navigation systems for automotive, transportation and materials handling applications. The (...)
From: D3 Engineering
Software development kit (SDK)

PROCESSOR-SDK-J721E — Software Development Kit for DRA829 & TDA4VM Jacinto™ processors

Processor SDK RTOS (PSDK RTOS) can be used together with either Processor SDK Linux (PSDK Linux) or Processor SDK QNX (PSDK QNX) to form a multi-processor software development platform for TDA4VM and DRA829 SoCs within TI’s Jacinto™ platform. The SDK provides a comprehensive (...)
Software development kit (SDK)

IGNTM-3P-AI-ROBOTICS — Ignitarium services for AI, sensor fusion, perception engineering, robotics and functional safety

Ignitarium is a product engineering services company that combines its deep expertise in semiconductor, artificial Intelligence and embedded systems to realize cost-effective system solutions to solve demanding real-world use cases. Ignitarium has specialized teams to develop software targeted (...)
From: Ignitarium
Application software & framework

HLA-3P-ADAS-FWD-CAM-ALGORITHMS — Hella Aglaia TDAx-based ADAS algorithms for front camera

HELLA Aglaia develops embedded software solutions for advanced driver assistance systems – compliant with certified industry standards and ready for hardware integration.

Leveraging the powerful deep learning capabilities of the TDA4x processor family, HELLA Aglaia’s robust image processing (...)

From: Hella Aglaia
Application software & framework

MOMENTA-3P-DL-ALGORITHMS — Momenta deep learning algorithms for ADAS forward camera applications on TDA4x processors

Momenta’s deep learning based algorithms for ADAS applications make full use of the DSP cores and accelerators on TDA4x for neural network processing. Designed to achieve market leading computational and power efficiency, Momenta’s algorithms offer an array of pre- and post-imaging (...)
From: Momenta
Code example or demo

ALDV-3P-INDUSTRIAL-VISION — Allied Vision embedded vision starter kit

Allied Vision helps people achieve their goals with industrial and embedded cameras for computer vision.

Allied Vision provides embedded system developers access to high-performance, industrial-grade camera modules and pave the way from PC to embedded systems for computer vision engineers. With the (...)

From: Allied Vision
Code example or demo

AMZN-3P-EDGE-AI — Amazon Services for ML training, model management and IoT

AWS offers a comprehensive platform for machine learning (ML) services and internet of things (IoT) software services which can be leveraged and deployed on TI’s analytics processors like the TDA4x family of processors. Training and optimizing ML models require massive computing resources, so (...)
From: Amazon
Code example or demo

ASTC-3P-VLAB-EVM-SIM — ASTC VLAB virtual development platforms and tools

VLAB Works is the industry leader in software technology for modeling, simulation, and virtual prototyping of embedded electronic systems. VLAB technologies and solutions enable the application of automation and agile processes to embedded systems development. VLAB Works helps customers design (...)
From: VLAB Works
Code example or demo

D3-3P-DEV — D3 support for AI cameras, hardware, drivers and firmware

D3 Engineering is a product development firm, specializing in embedded design solutions, that leverages DesignCore® Platforms and Solutions to get customers to market quicker with reduced risk. They bring over 20 years of experience developing vision and sensing systems for intelligent (...)
From: D3 Engineering
Code example or demo

KDN-3P-SLAM — Kudan SLAM for robotics on TI Edge AI

Kudan is a global deep technology company developing commercial artificial perception algorithms based on simultaneous localization and mapping (SLAM) since its founding in 2011. Kudan’s technology currently enables solutions for its partners in automotive, robotics, drone/UAV, mapping and (...)
From: Kudan Inc.
Driver or library

WIND-3P-VXWORKS-LINUX-OS — Wind River Processors VxWorks and Linux operating systems

Wind River is a global leader in delivering software for the Internet of Things (IoT). The company’s technology has been powering the safest, most secure devices in the world since 1981 and today is found in more than 2 billion products. Wind River offers a comprehensive edge-to-cloud product (...)
From: Wind River Systems
Firmware

VCTR-3P-AUTOSAR — Vector AUTOSAR, HSM, and networking software components for the automotive industry

Vector is the leading manufacturer of software tools and embedded components for the development of electronic systems and networking from CAN to Automotive Ethernet. Vector has been a partner of automotive manufacturers, suppliers and related industries since 1988, providing software components, (...)
From: Vector Informatik GmbH
IDE, configuration, compiler or debugger

C7000-CGT — C7000 code generation tools - compiler

The TI C7000 C/C++ Compiler Tools support development of applications for TI C7000 Digital Signal Processor cores.

Code Composer Studio is the Integrated Development Environment (IDE) for TI embedded devices.  If you are looking to develop on a TI embedded device it is recommended to start (...)
IDE, configuration, compiler or debugger

CCSTUDIO — Code Composer Studio™ integrated development environment (IDE)

Code Composer Studio؜™ software is an integrated development environment (IDE) that supports TI's microcontroller (MCU) and embedded processor portfolios. Code Composer Studio software comprises a suite of tools used to develop and debug embedded applications. The software includes an (...)
Operating system (OS)

GHS-3P-INTEGRITY-RTOS — Green Hills INTEGRITY RTOS

The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)
From: Green Hills Software
Operating system (OS)

QNX-3P-NEUTRINO-RTOS — QNX Neutrino RTOS

The QNX Neutrino® Realtime Operating System (RTOS) is a full-featured and robust RTOS designed to enable the next-generation of products for automotive, medical, transportation, military and industrial embedded systems. Microkernel design and modular architecture enable customers to create (...)
From: QNX Software Systems
Software programming tool

TI-EDGE-AI-CLOUD — Evaluate deep learning inference performance on TDA4x processors

TI Edge AI Cloud is a free online service that lets you evaluate accelerated deep learning inference on TDA4x processors. You do not need to purchase an evaluation board. The service is python-based; and it only takes a few minutes to login, deploy a model, and get a variety of performance (...)
Support software

RDGRN-3P-SW-SERVICES — RidgeRun services in Linux, Gstreamer plugins and AI application development

RidgeRun helps clients build, integrate, optimize, and maintain embedded software solutions to solve the unique challenges facing their specific industries and sectors. RidgeRun’s areas of expertise include:
  • Embedded Linux: Yocto, customization of BSPs, hardware bring up, camera drivers, ISP (...)
From: RidgeRun
Support software

SV-3P-ADAS_ALGORITHMS — StradVision SVNet - TDAx-based deep learning and camera based perception software

StradVision enables deep learning-based embedded perception algorithms on TDAx for Advanced Driver Assistance Systems (ADAS) and automated driving features. SVNet's lean and light characteristics enable more headroom for mutiple simultaneous functions, swift development and optimization, and (...)
From: Stradvision
Simulation model

DRA829 and TDA4VM BSDL File

SPRM751.ZIP (14 KB) - BSDL Model
Simulation model

DRA829 and TDA4VM IBIS File

SPRM752.ZIP (1983 KB) - IBIS Model
Simulation model

DRA829 and TDA4VM Thermal Model

SPRM753.ZIP (1 KB) - Thermal Model
Calculation tool

CLOCKTREETOOL — Clock Tree Tool for Sitara, Automotive, Vision Analytics, & Digital Signal Processors

The Clock Tree Tool (CTT) for Sitara™ ARM®, Automotive, and Digital Signal Processors is an interactive clock tree configuration software that provides information about the clocks and modules in these TI devices. It allows the user to:
  • Visualize the device clock tree
  • Interact with clock tree (...)
Calculation tool

PINMUXTOOL — Pin mux tool

The PinMux Utility is a software tool which provides a Graphical User Interface for configuring pin multiplexing settings, resolving conflicts and specifying I/O cell characteristics for TI MPUs. Results are output as C header/code files that can be imported into software development kits (SDKs) or (...)
Design tool

PROCESSORS-3P-SEARCH — Arm-based MPU, arm-based MCU and DSP third-party search tool

TI has partnered with companies to offer a wide range of software, tools, and SOMs using TI processors to accelerate your path to production. Download this search tool to quickly browse our third-party solutions and find the right third-party to meet your needs. The software, tools and modules (...)
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FCBGA (ALF) 827 View options

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