SDAA177 November   2025 AM62A7 , AM67A , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VEN-Q1 , TDA4VH-Q1 , TDA4VM , TDA4VP-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2C7xMMA DDR Usage Analysis and Optimization
  6. 3Testing Based on J722S and MobileNet
    1. 3.1 Firmware Compilation and Environment Configuration
    2. 3.2 Model Export and On-Board Inference
    3. 3.3 Memory Statistics
    4. 3.4 Modifying the Memory Map
    5. 3.5 Recompiling SDK and Updating to Board
    6. 3.6 On-Board Testing
  7. 4Summary
  8. 5References

1 Introduction

TI's SoC uses a shared memory approach, meaning the NPU shares physical memory with other cores. In the default system, a relatively large amount of memory is reserved for the NPU based on the SoC's resources. The reserved memory cannot be used by other cores, which in memory-constrained situations may cause other processes to fail due to the inability to obtain required memory, while the NPU may not fully use the pre-allocated memory space, resulting in a waste of precious resources. Therefore, we need to allocate memory space for C7xMMA according to the actual runtime conditions of the model to maximize resource utilization.