SDAA249 January   2026 AMC3330-Q1 , INA148-Q1 , TPS61170-Q1 , TPSI2240-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Background
    2. 1.2 Operation Principle
  5. 2Hardware Design
    1. 2.1 Solid State Relay (SSR)
    2. 2.2 Resistors
      1. 2.2.1 Minimum Resistance
      2. 2.2.2 Maximum Resistance
      3. 2.2.3 Resistance Ratio
    3. 2.3 Bias Supply
    4. 2.4 Amplifier
      1. 2.4.1 MCU on the Low Voltage Side
      2. 2.4.2 MCU on the AC Side
  6. 3Software Design
    1. 3.1 Settling Time
    2. 3.2 SSR Sequence
    3. 3.3 Voltage Threshold
    4. 3.4 Moving Average
    5. 3.5 Plausibility Check
    6. 3.6 Control Scheme Summary
  7. 4Simulation Results
    1. 4.1 Settling Time
    2. 4.2 Input Voltage Range
    3. 4.3 Plausibility Check
    4. 4.4 Accuracy
    5. 4.5 Influence of the Y Capacitor
  8. 5Summary
  9. 6References

4 Simulation Results

This section mainly verifies the effectiveness of the proposed hardware design and software control scheme. The simulation is built based on PLECS, and the simulation parameters are shown in Table 4-1.

Table 4-1 Simulation Parameters
Parameter Value
AC Voltage Magnitude 310V
AC Voltage Frequency 50Hz
DC Voltage 40V
Resistor Divider Branch ( Rst ) 1.6MΩ
Voltage Sense Resistor ( Rin ) 7.5kΩ
Insulation Resistance ( Riso_NOR ) 10MΩ
Insulation Resistance ( Riso_FLT ) 110kΩ