SDAA249 January   2026 AMC3330-Q1 , INA148-Q1 , TPS61170-Q1 , TPSI2240-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Background
    2. 1.2 Operation Principle
  5. 2Hardware Design
    1. 2.1 Solid State Relay (SSR)
    2. 2.2 Resistors
      1. 2.2.1 Minimum Resistance
      2. 2.2.2 Maximum Resistance
      3. 2.2.3 Resistance Ratio
    3. 2.3 Bias Supply
    4. 2.4 Amplifier
      1. 2.4.1 MCU on the Low Voltage Side
      2. 2.4.2 MCU on the AC Side
  6. 3Software Design
    1. 3.1 Settling Time
    2. 3.2 SSR Sequence
    3. 3.3 Voltage Threshold
    4. 3.4 Moving Average
    5. 3.5 Plausibility Check
    6. 3.6 Control Scheme Summary
  7. 4Simulation Results
    1. 4.1 Settling Time
    2. 4.2 Input Voltage Range
    3. 4.3 Plausibility Check
    4. 4.4 Accuracy
    5. 4.5 Influence of the Y Capacitor
  8. 5Summary
  9. 6References

5 Summary

This design guide introduces common IMD architectures in bidirectional OBCs. The active single-switch architecture proposed in this paper has advantages, such as the ability to detect symmetrical insulation failures, operation independent of AC voltage, potentially lower isolation costs, and the steady-state voltage threshold independent to the Y capacitor; offering significant benefits in OBC applications. This paper elaborates on the hardware design of this solution, including SSRs, resistors, operational amplifiers, and DC power supplies. This paper also introduces the software design of this solution, including control sequencing, voltage thresholds, data processing and how to configure the settling time to reduce the impact of the Y capacitor on the transient state. Finally, the effectiveness of this solution is verified through simulation. The target of these analyses is to provide step-by-step design guidance of an IMD design.