SDAA301A March   2026  – June 2026 TPS25762-Q1 , TPS25763-Q1 , TPS25772-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2PD Controller Host Interface Description
    1. 2.1 TPS257xx-Q1 I2C Target Addresses
    2. 2.2 Host Interface Protocol
  6. 3TPS257xx-Q1 Telemetry Registers
    1. 3.1 STATUS Register (Address = 1Ah)
    2. 3.2 POWER PATH STATUS Register (Address = 26h)
    3. 3.3 THERMAL ENG PWR STATUS Register (Address = 96h)
    4. 3.4 DEVICE INFO Register (Address = 2Fh)
    5. 3.5 CUSTOM ID (Version Control) Register (Address = 06h)
  7. 4Summary
  8. 5References
  9. 6Revision History

2.2 Host Interface Protocol

The Host Interface allows for complex interactions between an I2C controller and a PD Controller. The I2C Target unique address is used to receive or respond to Host Interface protocol commands. Figure 2-1 and Figure 2-2 show the write and read protocols, respectively.

When writing a register that has a defined length of N bytes, if the I2C transaction only contains n bytes then the final (N - n) bytes of the register remain unchanged.

When reading a register that has a defined length of N bytes, the I2C controller may terminate the I2C read transaction after the first n bytes (n < N).

I2C Host Interface Write Register ProtocolFigure 2-1 I2C Host Interface Write Register Protocol
I2C Host Interface Read Register ProtocolFigure 2-2 I2C Host Interface Read Register Protocol