SDAA429A June   2026  – October 2026 MSPM0G5187

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 MSPM0G5187 with TinyEngine NPU
  6. 3 Edge AI Toolchains
    1. 3.1 TI Edge AI Studio
    2. 3.2 TI Tiny ML Tensorlab
    3. 3.3 TI Neural Network Compiler
  7. 4 Rapid Prototyping Through TI Edge AI Studio
    1. 4.1 Project Setup
    2. 4.2 Data Capture
      1. 4.2.1 Hardware Setup
      2. 4.2.2 Feature Overview
    3. 4.3 Data Import
      1. 4.3.1 Classification Task
      2. 4.3.2 Regression Task
      3. 4.3.3 Forecasting Task
      4. 4.3.4 Annotation List
    4. 4.4 Data Annotation
    5. 4.5 Model Training
      1. 4.5.1 Training Parameter
      2. 4.5.2 Toolchain Dependency
    6. 4.6 Performance Reports
    7. 4.7 Model Export
  8. 5 Advanced Development Through TI Tiny ML Tensorlab
    1. 5.1 Environment Setup
    2. 5.2 Data Acquisition
      1. 5.2.1 Data Retrieval
      2. 5.2.2 Data Validation
    3. 5.3 Model Architecture Iterative Refactoring
      1. 5.3.1 Baseline Implementation
      2. 5.3.2 Refactoring With PyTorch Built-in Modules
      3. 5.3.3 Data Pipeline Optimization
      4. 5.3.4 Transition to CNN Architecture
    4. 5.4 Model Export
    5. 5.5 Quantization-Aware Training
    6. 5.6 Model Compilation
  9. 6 Edge AI Application: Digit Recognition
    1. 6.1 LeNet-5 Variant CNN Model
    2. 6.2 NPU/CPU Performance Comparison
  10. 7 Edge AI Application: Waveform Classifier
    1. 7.1 Feature Extraction
    2. 7.2 Time-Series Classification Model
    3. 7.3 Model Memory Considerations
    4. 7.4 NPU/CPU Performance Comparison
  11. 8 Summary
  12. 9 References
  13. 10Revision History

3.3 TI Neural Network Compiler

The TI Neural Network Compiler (NNC) is TI's embedded AI compilation toolchain for MCU devices, built on the TVM compiler framework. TI NNC enables flexible deployment of the AI model to either the hardware NPU accelerator or the host CPU through a simple compilation configuration, with no changes required to the application code or model side. The inference is always invoked through the unified interface, enabling developers to integrate AI inference into embedded applications without requiring deep knowledge of the underlying hardware architecture.
Table 3-2 NPU/CPU Deployment Configuration Comparison
Target Deployment Configuration Symbol Initialization Requirement Invoke Inference
Host CPU TVMGEN_DEFAULT_TI_NPU_SOFT Yes, initialize NPU before Inference tvmgen_default_run()
Hardware NPU TVMGEN_DEFAULT_TI_NPU No

To compile the model for the MSPM0 series, configure your environment and execute the TVMC compilation command as shown below.

Linux® / macOS

export ARM_CGT_PATH=/path/to/ARM-CGT
export PATH=$ARM_CGT_PATH/bin:$PATH
export TIARMCLANG_OPTIONS_M0="-Os -mcpu=cortex-m0plus -march=thumbv6m -mtune=cortex-m0plus -mthumb -mfloat-abi=soft -I. -Wno-return-type"
tvmc compile --target="c, ti-npu type=soft" --target-c-mcpu=cortex-m0plus ./model.onnx -o artifacts_m0/mod.a --cross-compiler="tiarmclang" --cross-compiler-options="$TIARMCLANG_OPTIONS_M0"
Windows® Git BASH
export ARM_CGT_PATH="\path\to\ARM-CGT"    # e.g. "C:\\ti\\ti-cgt-armllvm_4.0.3.LTS"
export PATH=$ARM_CGT_PATH\\bin:$PATH
export TIARMCLANG_OPTIONS_M0="-Os -mcpu=cortex-m0plus -march=thumbv6m -mtune=cortex-m0plus -mthumb -mfloat-abi=soft -I. -Wno-return-type"
tvmc compile --target="c, ti-npu type=soft" --target-c-mcpu=cortex-m0plus ./model.onnx -o artifacts_m0/mod.a --cross-compiler="tiarmclang" --cross-compiler-options="$TIARMCLANG_OPTIONS_M0"
Windows PowerShell
$env:ARM_CGT_PATH="\path\to\ARM-CGT"      # e.g. "C:\\ti\\ti-cgt-armllvm_4.0.3.LTS"$env:PATH=$env:ARM_CGT_PATH + "\bin;" + $env:PATH $env:TIARMCLANG_OPTIONS_M0="-Os -mcpu=cortex-m0plus -march=thumbv6m -mtune=cortex-m0plus -mthumb -mfloat-abi=soft -I. -Wno-return-type"
tvmc compile --target="c, ti-npu type=soft" --target-c-mcpu=cortex-m0plus .\model.onnx -o artifacts_m0/mod.a --cross-compiler="tiarmclang" --cross-compiler-options="$env:TIARMCLANG_OPTIONS_M0"
Tip: If users do not require a binary output (for example, when generating C code only), the ARM Clang compiler is not required. You can omit the cross-compiler arguments from the command.
For more information, see TI Neural Network Compiler for MCUs User’s Guide.