SLAU863 October   2021 ADC12DJ4000RF , ADC12DJ5200RF , TRF1208

 

  1.   Trademarks
  2. 1Features
  3. 2Equipment
    1. 2.1 Evaluation Board Feature Identification Summary
    2. 2.2 Required Equipment
  4. 3Setup Procedure
    1. 3.1  Install the High Speed Data Converter (HSDC) Pro Software
    2. 3.2  Install the Configuration GUI Software
    3. 3.3  Connect the EVM and TSW14J57EVM
    4. 3.4  Connect the Power Supplies to the Boards (Power Off)
    5. 3.5  Connect the Signal Generators to the EVM (Signal Generator's RF Outputs Disabled Until Directed)
      1. 3.5.1 When External Clocking is Used
    6. 3.6  Turn On the TSW14J57EVM Power and Connect to the PC
    7. 3.7  Turn On the ADCxxDJxx00RF-TRF1208-EVM Power Supplies and Connect to the PC
    8. 3.8  Turn On the Signal Generator RF Outputs
    9. 3.9  Open the ADC12DJ5200RFEVM GUI and Program the ADC and Clocks
    10. 3.10 Calibrate the ADC Device on the EVM
    11. 3.11 Open the HSDC Software and Load the FPGA Image to the TSW14J57EVM
    12. 3.12 Capture Data Using the HSDC Pro Software
  5. 4Device Configuration
    1. 4.1 Supported JESD204C Device Features
    2. 4.2 Tab Organization
    3. 4.3 Low-Level Control
  6. 5Troubleshooting the ADCxxDJxx00RF-TRF1208-EVM
  7. 6HSDC Pro Settings for Optional ADC Device Configuration
    1. 6.1 Changing the Number of Frames per Multi-Frame (K)
    2. 6.2 Customizing the EVM for Optional Clocking Support
      1. 6.2.1 External Clocking Option (Default)
      2. 6.2.2 Onboard Clocking Option
      3. 6.2.3 External Reference Clocking Option
        1.       31
  8. 7Signal Routing
  9. 8References
    1. 8.1 Technical Reference Documents
    2. 8.2 TSW14J57EVM Operation
  10.   A Analog Inputs
    1.     37
  11.   B Jumpers and LEDs
    1.     10.A Jumper Settings

1 Features

This evaluation board also includes the following important features:

  • A single-ended transformer coupled channel allowing a bandwidth from 2 GHz to 7 GHz
  • A single-ended channel with TI's high speed differential amplifier TRF1208 allowing a bandwidth from 10 MHz to 8 GHz
  • The LMX2594 clock synthesizer generates the ADC sampling clock
  • The LMK04828, LMK61E2 and LMX2594 onboard system clock generator generates SYSREF and FPGA reference clocks for the high-speed serial interface
  • Transformer-coupled clock input network to test the ADC performance with an external low-noise clock source
  • LM95233 temperature sensor
  • High-speed serial data output over a High Pin Count FMC+ interface connector
Note: To improve signal routing quality, serial lane polarity is inverted with respect to the standard FMC VITA-57 signal mapping. Signal mapping and polarity is shown in Table 7-1).
  • Device register programming through USB connector and FTDI USB-to-SPI bus translator
Figure 1-1 EVM Orientation

The digital data from the ADCxxDJxx00RF-TRF1208-EVM board is quickly and easily captured with the TSW14J57EVM data capture boards.

Note:

The TSW14J57EVM cannot be used for JMODES that use 64b/66b encoding, or serial rates above 15 Gbps.

The TSW14J57EVM captures the high-speed serial data, decodes the data, stores the data in memory, and then uploads it to a connected PC through a USB interface for analysis. The High-Speed Data Converter Pro (HSDC Pro) software on the PC communicates with the hardware and processes the data.

With proper hardware selection in the HSDC Pro software, the TSW14J57 device is automatically configured to support a wide range of operating speeds of the ADCxxDJxx00RF-TRF1208-EVM, but the device may not cover the full operating range of the ADC device. Serial data rates of 15 Gbps down to 1 Gbps are supported.