SLAU888 may 2023 AFE882H1
The EVM board provides access to the digital AFE882H1 pins through headers J9 and J15. Table 3-1 lists the J9 pin definitions and Table 3-2 lists the J15 pin definitions.
| Pin Number | Signal | Description |
|---|---|---|
| 1 | SCLK | AFE882H1 SPI serial clock input |
| 3 | PICO | AFE882H1 SDI (serial data input), optional GPIO5 |
| 5 | POCI | AFE882H1 SDO (serial data output), optional GPIO4 |
| 7 | CS | AFE882H1 chip select input, optional GPIO6 |
| 9 | TXD | AFE882H1 UART output, optional GPIO2 |
| 11 | RXD | AFE882H1 UART input, optional GPIO3 |
| 13 | RTS | AFE882H1 HART request to send |
| 2, 4, 6, 8, 10, 12, 14 | GND | Ground |
| Pin Number | Signal | Description |
|---|---|---|
| 1 | CD | AFE882H1 HART carrier detect, optional GPIO1 |
| 3 | RESET | AFE882H1 device reset |
| 5 | ALARM | AFE882H1 alarm signal |
| 2, 4, 6 | GND | Ground |
The EVM board also provides access to the digital XTR305 pins through headers J16. Table 3-3 lists the pin definitions for J16.
| Pin Number | Signal | Description |
|---|---|---|
| 1 | XTR_OD | XTR305 output disable |
| 3 | XTR_M2 | XTR305 voltage and current select |
| 5 | XTR_EFCM | Error flag for common mode over range, active low |
| 7 | XTR_EFLD | Error flag for load error, active low |
| 9 | XTR_EFOT | Error flag for overtemperature, active low |
| 2, 4, 6, 8, 10 | GND | Ground |