SLAU927C March 2024 – March 2025 MSPM0G3507
Table 5-31 shows the register to configure fault settings1.
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31-6 | RESERVED | R/W | 0h | Reserved |
| 5-2 | LCK_RETRY | R/W | 0h |
Lock detection retry time 0h = 100ms 1h = 500ms 2h = 1s 3h = 2s 4h = 3s 5h = 4s 6h = 5s 7h = 6s 8h = 7s 9h = 8s Ah = 9s Bh = 10s Ch = 11s Dh = 12s Eh = 13s Fh = 14s |
| 1-0 | MTR_LCK_MODE | R/W | 00b | Motor Lock Mode 0h = Motor lock detection causes latched fault; nFAULT active; 1h = Fault automatically cleared after LCK_RETRY time. 2h = Motor lock in report only mode. 3h = Motor lock detection is disabled |